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There’s a fundamental paradox in the emerging Internet of Things (IoT) marketplace. Devices must be “always alert,” yet they must also be low cost and extremely energy-efficient. At the recent CDNLive Silicon Valley 2015 conference Chris Rowen, CTO of the Cadence IP Group, talked about ways of resolving this paradox.
Rowen first promised to “decode a bit of the hype” that surrounds IoT, noting that this term tells us that we will soon have many more sensors (in billions of connected devices) that will gather a wide variety of information. This data will be aggregated and shipped to points of analysis, most typically in the cloud. Always-alert devices will “always be ready to be triggered, and ready to gather information when information with any possible interest is there to be gathered,” Rowen said.
The trick to “always alert” is how designers manage compromises around energy. IoT end user devices or “edge nodes” must typically operate on microwatts of energy, and must provide very long battery lives. Some will use energy harvesting from the environment they operate in. Costs must be kept very low as well, and designing systems on chip (SoCs) with billions of transistors at the latest processor node will generally not be an option, although an advanced SoC may have an always-alert subsystem.
Layers and Challenges
An IoT device, Rowen noted, must collect data where the data is, and then aggregate it in a place that every authorized person can access. It may be useful to think of IoT in three layers, he said. At the lowest level, edge nodes are the “things” that gather the information. The middle layer, which Rowen called “the fog,” refers to devices that hook up directly to the Internet such as PCs and smartphones. The “cloud” refers to the servers where data is aggregated.
“The biggest impact of IoT thinking is not in the architecture of the cloud,” Rowen said. “It’s that the nature of designing silicon for the edge devices is quite different from what we have done before. They are driven by additional metrics such as cost and energy, and they have a diversity of form factors. Always alert affects both hardware and software architectures.”
Rowen discussed the design challenges for always-alert nodes (see diagram below). One very important area is security and safety. IoT devices are often in control of physical systems, he noted. “A telephone can hurt you if you drop it on your toe, but it isn’t going to kill you. Some of these [IoT] devices can kill you,” he said.
The markets for IoT devices include wearables, medical, and smart homes. Applications in these areas are “moving very fast” because of the big market opportunity and narrow market windows, Rowen said. One result is rapid innovation in algorithms, devices, silicon, and software.
There are four types of sensors, each with different computational requirements, Rowen said. These include the following:
How can the system architecture respond to these demands? You need something that is “highly intelligent,” Rowen said, and is dissipating only microwatts on average. This leads to the concept of “layered cognition,” which is depicted in the diagram below.
In this smartphone example, we are starting with an always alert but “quiescent” system. It receives some input that the system should respond to directly, such as “hello audio.” This may cost only tens of microwatts. Next we make a specific request, such as “turn up the volume,” and that causes an audio subsystem to turn on. This may take 1-50 milliwatts, but the applications CPU hasn’t turned on yet.
With the more specific request to play a specific song, the applications CPU wakes up, and this level of processing will dissipate tens to hundreds of milliwatts. Finally, if we raise a broader inquiry such as “What is Madonna’s biggest hit,” the smartphone database doesn’t have that information and we must go to the cloud, costing watts of power.
“This notion of layered cognition allows us to operate most of the time down here [lower levels of diagram], but then have the functionality of a full cloud-based environment,” Rowen said. “Part of the system is always alert. It functions as an applications filter that is deciding which problems it can solve for itself and which problems really do have to go up to the cloud applications layer.”
Building an Always-Alert Sensor Node
Rowen presented an example of an always-alert 5mm2 sensor node with analog components including radio and baseband, on-chip memory, low-energy processor, digital baseband blocks, and a power amplifier. He then discussed architectural principles for a sensor-rich always-alert system, including these points:
“You can build a processor that is significantly more efficient, implement DSP and CPU and custom logic features together in the same unit, which is fully modeled in software and supported in compilers and delivered as source RTL,” Rowen said. Cadence has this capability with its Tensilica Xtensa IP and has delivered around 6,000 variants in production RTL, he said.
Insect-Scale SoC Design and the Internet of Things
According to Rowen, a new category of chip designs called “extreme-fit SoCs” is emerging. These are highly specialized SoCs designed to support a given application with high performance, low power and low cost. In contrast, conventional SoCs tend to be “extreme-scale SoCs” that support a wide range of applications. To be competitive, they must go to advanced nodes and consume billions of transistors.
Rowen believes that extreme-fit SoCs will be the “insects” of the IoT world, while extreme-scale SoCs will be the “mammals.” While there are over a million species of insects in the world, there are only around 5,000 species of mammals. “We expect to see more and more proliferation of insect-scale SoC design,” he said.
Some extreme-fit SoCs use Xtensa processors, and Rowen described SoC examples from Qualcomm, Expressif, Audience Inc., MegaChips, and Seiko Epson. He concluded his talk with these takeaways:
Other Cadence blog posts from CDNLive Silicon Valley 2015
CDNLive 2015: Cadence Innovus Implementation System Fires Up ARM Cortex-A72 Processor
Anirudh Devgan at CDNLive 2015 – How Innovus Will Change IC Implementation
CDNLive Silicon Valley 2015: A “New Era” in Digital Implementation
CDNLive Silicon Valley 2015: Battery Constraints, Feature Crunch Require Design Rethinking – ARM CEO
CDNLive Silicon Valley 2015: ‘Sea Change’ in Design Creates Opportunities: Lip-Bu Tan