Get email delivery of the Cadence blog featured here
Lip-Bu Tan, Cadence president and CEO, is excited about ongoing innovation within the electronics industry - but he's also aware of challenges such as advanced node lithography, complexity, time-to-market, and rising design costs. In a keynote speech at the CDNLive Silicon Valley conference March 12, 2013, Tan spoke passionately about market drivers, challenges, and how Cadence is responding.
The CDNLive Silicon Valley user conference runs March 12-13, and it drew over 800 attendees for around 100 technical sessions, mostly given by Cadence customers or partners. Keynote speeches were given by Lip-Bu Tan; Young Sohn, president and chief strategy officer of Device Solutions at Samsung (blog post here); and Martin Lund, vice president of R&D for the Cadence SoC Realization Group (blog post here). For blogs, tweets, pictures and reports from the conference, see the CDNLive Multimedia page.
Tan began his keynote by noting the "exciting times" we live in, with new, innovative products that improve quality of life. He talked about 3D TV (which he hopes to experience without glasses), wearable medical devices, Google Glass, and more. He then discussed major market drivers including mobility, social media, cloud computing, and the "Internet of things."
Exabytes of Data
The mobile Internet is really taking off, Tan noted, and that will involve the transfer of massive amounts of data. He showed some data from Cisco that predicts a 66% compound annual growth rate in mobile data traffic from 2012 to 2017, culminating in 11.2 Exabytes/month by 2017 (an Exabyte is one quintillion bytes). Much of this data is going into the cloud, and one result is a tremendous growth in data centers.
Tan cited more big numbers to illustrate the spectacular growth of electronics content:
Semiconductors are at the heart of all electronic devices, Tan noted - not just the "Internet of things" but also the cloud, your car, and home entertainment. "It is very important for us to help the industry develop all these new products, so we and our kids can enjoy quality of life and get any data we want at our fingertips."
Challenges to Solve
However, some challenges come along with the excitement. One challenge is that lithography is "hitting the wall" with upcoming process nodes. Tan noted there are several ways to work around it - FinFETs, 3D-ICs, and massive parallelism. He also said he is keeping a "very close eye" on extreme ultraviolet (EUV) lithography and expects that at some point it will provide a "breakthrough." Meanwhile, Tan said, "we always find a way to solve problems - I am confident we will find a way to do it."
A second challenge is design complexity, which is driven by factors including hardware/software co-development, mixed-signal design, and low power design. A third challenge is meeting time-to-market demands, given that these times are growing much shorter.
A fourth challenge is reducing semiconductor design costs. "This is very important to me because as a VC [venture capitalist], I used to know 30 guys investing in semiconductors. Now I can't even count five. That is very depressing. Big companies I talk to are worried that 10 years from now, there will be no companies to buy and no new technology coming up."
How Cadence Can Help
Tan listed several ways that "Cadence can help you build great products." First, he said, Cadence will "continue to drive the roadmap on advanced nodes" including 20nm, 16nm, 14nm, and 10nm.
This will require a lot of collaboration. Tan mentioned the recent collaboration between Cadence, ARM and Samsung to design a 14nm FinFET test chip including an ARM Cortex-A7 (see my previous blog post here). He also noted the deep collaboration between Cadence and TSMC on the development of the TSMC chip-on-wafer-on-substrate (CoWoS) process for 3D-ICs (blog post here).
Cadence is also driving hard on IP solutions, Tan said, with a focus on "silicon proven, high quality" IP. Following the 2010 Denali purchase, Cadence is strong in memory IP and a leader in verification IP. In February 2013 Cadence announced an agreement to purchase Cosmic Circuits, which adds a "fabulous team" along with analog IP.
On March 11, 2013, Cadence announced an agreement to acquire Tensilica, a successful provider of Dataplane Processor Units (DPUs) that can be customized for a variety of embedded data and signal processing applications. "One thing that's really exciting," Tan said, "is that it's not traditional DSP, it's a DPU and they have a programmable capability. We think the combination of Tensilica with Cadence tools and some of our IP will provide a very strong solution."
The real beneficiary of these activities, Tan said, is the customer's customer - the end users of the products that Cadence tools help create. To this end he talked about the success of the GoPro camera (Tan is an investor in the company) and how it was built using Cadence tools and IP. This kind of success just might excite some college grads and get them to work for an EDA or fabless semiconductor company. "We'd love to have talent like that," Tan said.
Related Blog Posts
Samsung CDNLive Keynote: Innovation and Challenges in the Post-PC Era
Martin Lund CDNLive Keynote: Why SoCs Need "Application Optimized" IP