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Low power design has been a ubiquitous topic in the electronics industry the past couple years. The term "holistic" is often used (or over-used) to describe how you should approach low power design. I think the best illustration of how to approach low power design the right way to meet a customer's aggressive power specifications, is a recent interview that Cadence was able to do wtih Julien Buros, digital design team lead, for NemeriX.
Cadence: Please tell us something about NemeriX.
Julien: NemeriX is a fabless company based in the south of Switzerland. We develop low power GPS solutions, including hardware, software and firmware. We are entering our sixth year and our fourth generation of product.
Cadence: What is your customer base?
Julien: The boom of GPS started with the automotive market and is migrating into the cell phone market. Our customer base is still mainly in the automotive–oriented personal navigation device (PND) market, but we see stronger demand in the cellphone market where our low-power advantage is an important differentiator for our customers and consumers.
Cadence: Can you tell us a little more about why the market needs low power?
Julien: In the cell phone market—and handheld market in general—low power is a major concern. I guess we all expect that our new phone is going to have plenty of new features but we are not ready to charge the battery twice as often as before. When a new functionality—such as GPS—is added into one device, you have to make sure that it is not going to jeopardize the phone’s autonomy and negatively impact the whole user experience.
Cadence: Can you explain your general design strategy for low power design.
Cadence: Having an integrated team covering all aspects of the design is a big plus.
Julien: Yes. While many NemeriX employees come from large companies, they often experienced the fact that the large size of a company can be a handicap for low-power design as communication between teams is not as easy as in a smaller structure. Being smaller and focused helps NemeriX have the necessary big-company processes in place, while also giving us the flexibility of small-company communication and execution. And since low power means to design something that is as “fit” as possible, it is very important not to over engineer your product.
Cadence: What is the value for you in using the Cadence Virtual CAD service program to support your design process?
Cadence: What node are you working at now?
Julien: We used VCAD for 130nm, for 90nm and, now, for 65nm.
Cadence: Can you briefly describe the flow and tools that you use today for design and signoff?
Cadence: Any comments on the low power flow within the Cadence tools?
Cadence: Would you use the Common Power Format flow again in your designs?
Julian: Yes. Basically, the CPF-based flow has optimized a lot of manual steps that were introducing risk in the design. Also, all the verification methodology that is built around CPF with Conformal Low Power, for example, has brought a lot of confidence.
Cadence: Thank you for your time. It sounds like you this is an exciting time for you.
Julien: Yes, great company, great technical field and great team—and, we are just 40 minutes away from the ski slopes!
Julien Buros, digital design team lead, has been with NemeriX since 2002. Before that he worked at ST Microelectronics in the RnD CAD group. Julien received his engineering degree and master thesis in the Polytechnic Institute of Grenoble.