Cadence® system design and verification solutions, integrated under our Verification Suite, provide the simulation, acceleration, emulation, and management capabilities.
Verification Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
More Support Log In
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
The Cadence Academic Network helps build strong relationships between academia and industry, and promotes the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence.
Participate in CDNLive
A huge knowledge exchange platform for academia to network with industry. We are looking for academic speakers to talk about their research to the industry attendees at the Academic Track at CDNLive EMEA and Silicon Valley.
Come & Meet Us @ Events
A huge knowledge exchange platform for academia. We are looking for academic speakers to talk about their research to industry attendees.
Americas University Software Program
Join the 250+ qualified Americas member universities who have already incorporated Cadence EDA software into their classrooms and academic research projects.
EMEA University Software Program
In EMEA, Cadence works with EUROPRACTICE to ensure cost-effective availability of our extensive electronic design automation (EDA) tools for non-commercial activities.
Apply Now For Jobs
If you are a recent college graduate or a student looking for internship. Visit our exclusive job search page for interns and recent college graduate jobs.
Cadence is a Great Place to do great work
Learn more about our internship program and visit our careers page to do meaningful work and make a great impact.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
Overview All Courses Asia Pacific EMEANorth America
Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.
Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technology. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Get email delivery of the Cadence blog featured here
After providing a brief refresher on functional coverage basics, the paper went on to ask: “How do analog effects get captured in functional coverage while performing system level verification?” Since analog effects are described in form of floating point numbers, it becomes apparent that to meet the needs of mixed-signal in functional coverage, the language needs to support a floating point (aka real) data type. Since SystemVerilog is widely used in verification, we developed our proposal around the P1800-2009 standard of SystemVerilog.
The paper then went into the detailed mechanics of real typed SystemVerilog coverpoint objects. It highlighted an important extension to the language, specifically an instance-specific covergroup option called range_precision, to divide a range of vector bins into sub-ranges. It also explained how the existing features of SystemVerilog covergroup can be modified or extended with the introduction of real data type. Finally, the paper explored some of the challenges that are still open in the areas of floating point arithmetic and issues related to overflow and underflow. It drew a conclusion stating that our next step would be to complete an analysis of the Functional Coverage Section of the P1800 SystemVerilog Language Reference Manual (P1800-2012) and then work with the SV-EC sub-committee members for standardization of our proposal.
The audience was primarily filled with users from the digital verification community, and therefore there was a lot of curiosity in hearing a presentation coming from someone more oriented to the analog and mixed-signal world. An engineer from Dialog Semiconductor expressed strong interest in our work and stated that she found immediate use of this approach in her group’s verification initiatives. There was a concern raised by one member of the audience who wondered whether we’re trying to make the language more complex. We explained that the we were only proposing extensions that fill the gap between the existing integral type support to the desired level of real data type support.
There were some very good suggestions provided as part of audience feedback, such as consideration of logarithmic ranges and also support for the real data type for transition bins.Overall it was a very enriching experience for me and my colleagues to share our work with a community of folks who are certainly showing signs of interest to extend standard verification techniques to the wonderful world of analog. If you need further information on the presentation, please do not hesitate to contact me at email@example.com.