Mixed-Signal Design Blogs

At CDNLive-Silicon Valley this year, we had an excellent mixed-signal track for two days. Cadence customers including IBM, Texas Instruments, Maxim and Freescale shared their mixed-signal methodologies and tricks with the Cadence design community. The key challenges that our mixed-signal customers face are in SoC level verification and seamless analog/digital implementation. Cadence has been addressing these challenges...

We are seeing a huge trend -- the mobile revolution is changing the way we go about our everyday lives. Gone are the days where the term 'Internet' was associated with a PC or Mac. The smartphone revolution has changed how the data is consumed and used by consumers and businesses. For example, with the new line of smart systems, every device or appliance is connected to the Internet to manage their services in a better...

Cadence holds a leading position in the EDA industry due to its broad product portfolio catering to digital and analog designs and the ever popular mixed-signal designs. With its immense technical and market leadership based on the Virtuoso platform for analog design and Encounter platform for digital design , Cadence EDA products helps designers achieve productivity gains and predictable design closure for today's complex...

In September 2012, Cadence held its second Mixed-Signal Summit in San Jose, California. 150 users attended the Summit. The full day program was packed by user presentations. Strong participation and attendance was yet another confirmation of increased design activities in the mixed-signal area. Attendees used the opportunity to ask questions, share experiences and network. Dr. Chi-Ping Hsu, Cadence Senior Vice president...

Japan’s semiconductor industry is undergoing a significant change in recent years. We are seeing a shrinking business in SoC development while design and semiconductor companies are trying to focus more on higher profitable and differentiable products like microcontrollers and power management ICs. Most such designs are mixed-signal designs and hence the demand for technologies and innovations in this area is very high...

Are you working in the area of mixed signal? Then you may want to exchange information and experiences with other engineers. At the Cadence Community, a new Mixed-Signal Design Forum has been launched, providing a place to discuss topics that cross between analog and digital domains. It doesn't matter if you're just starting with mixed-signal design, or you have a lot of experience. This is a customer-driven forum that...

The recently concluded ARM TechCon 2012 , the annual event for ARM users (including hardware and software engineers) along with ARM ecosystem partners, was a huge success. Once again, this event showcased the excellent Cadence-ARM partnership that's helping to bring next generation electronic designs to fruition for our customers. Cadence had a huge presence at ARM TechCon. On the first day (Chip Design Day) Cadence...

The well attended Mixed-Signal Technology Summit last month really demonstrated the tremendous interest our customers have in learning new methodologies and techniques for mixed-signal designs. I would like to share some interesting data points based on a survey from the attendees of the event. Among the close to 200 attendees, 73% were designers with analog centric design experiences. However, about 24% of them declared...

A press release and a blog post caught my attention this week (October 15, 2012), and they have clearly demonstrated Cadence's leadership in 20nm process nodes and mixed-signal solutions. The press release is titled " TSMC Selects Cadence Virtuoso and Encounter Platforms for its 20nm Design Infrastructure, Spanning Custom/Analog, Digital and Mixed-Signal Design ." This press release emphasizes that TSMC's 20nm reference...

I recently came across a Wall Street Journal article, "ARM Chases Bigger Slice of Smaller Chips," that provides a very interesting perspective on how ARM is positioned to capture the microcontroller market, which is its next growth area. ARM based microprocessors are clearly dominating the mobile products from smart phones to tablets across Windows, Android and IOS mobile eco-systems. Most of these devices are using...

Even though it's been over 2 months since this year's Design Automation Conference in San Francisco, I am still surprised by the response that metric-driven, mixed-signal verification gets from our design community. Cadence had quite a few customer presentations at the EDA360 Theater at DAC this year. However, there was one presentation titled "Metric Driven Verification Approach for Analog/Mixed Signal IPs" authored...

While most of my colleagues in the US were taking a nice break during the July 4 th week, a small group of people including me was on the road for a mixed-signal Tech-on-Tour in China. There was some debate internally on whether designers in China would be interested in such a topic. What we had experienced last week was a clear (not mixed) signal from the IC designer community in China that they are hungry for knowledge...

About a year ago, Cadence offered a worldwide Tech-On-Tour (ToT) series for mixed-signal designs. One main objective of this seminar series is to bring the awareness of the need for a design methodology change to the broad mixed-signal designer community worldwide. The event was very successful and you can find some previous blog coverage here: M/S Technology on Tour Blog - Model Validation and Assertion Based Verification...

Analog/mixed-signal design is a hot topic at the Design Automation Conference! At DAC 2012 at San Francisco's Moscone Center next week (June 4-7), you can keep up with the latest developments in mixed-signal design methodology, including design, implementation and verification. You will find it is very hard to choose from so many options. Here is a quick guide to presentations, demos and other events Cadence is involved...

The new era of “Internet Everywhere” creates a whole new spectrum of applications, ranging from health care, automotive, to entertainment and cloud computing, which demand more and more mixed-signal and low power designs. In fact, mixed-signal applications have become one of the fastest growing segments in the electronics and semiconductor industry. Traditional mixed-signal designs treat the analog and digital designs...

Let's assume you are managing a schematic-driven top level design in Virtuoso and you want to import a digital block Verilog netlist into Virtuoso. This is a very common use model in mixed-signal implementation. While the Layout Database is saved in Open Access (OA), the optimized Verilog netlist needs to be imported into Virtuoso. Why use CPF? The Common Power Format (CPF) describes the design power intent for the whole...

The purpose for creating a Pcell is to automate the creation of data. Pcells should be designed as standalone entities, independent of the environment in which they are created and independent of the variety of environments in which you or someone else might want to use them. An environment can react to a Pcell, but Pcell code should not react to, interact with, or be dependent on an environment. Although it is possible...

Mixed-signal applications are among the fastest growing segments in the electronics and semiconductor industry. Applications in mobile communication, networking, power management, automotive, medical, imaging, safety and security require a very high integration of analog and digital functionality at system, SoC and IP levels. Unfortunately, compared with the advancement of digital designs over the past decade, the state...

With the escalating complexity of analog mixed-signal (AMS) chips, increasing digital content in response to new functionality demands, and steady growth of IP blocks into larger and larger SoCs, traditional AMS verification flows are becoming inefficient in handling full chip verification. High-performance digital verification and high accuracy analog verification represented the foundation for traditional AMS verification...

On the last day of February 2012, I presented a proposal at the DVCon 2012 Conference to extend SystemVerilog to support a real data type in coverpoint objects in order to facilitate mixed-signal verification for functional coverage. The paper, titled “ Bringing Continuous Domain into SystemVerilog Covergroups, ” reflected a year-long effort between Cadence R&D and Scott Little of Freescale (Scott moved to Intel just...

With the theme of Connect, Share and Inspire, this year's CDNLive! Silicon Valley March 13-14, 2012 will be an exciting forum for Cadence customers to share their most recent chip design successes and learn from each other. Among close to 100 presentations during the packed two day agenda, one area stands out is mixed-signal design. There are more than 10 presentations with specific focuses on mixed-signal design challenges...

The China Annual Creativity in Electronics (ACE) Awards was established to recognize individuals, companies and technologies that have made profound impacts in the overall China electronics industry each year. Joining with the industry prestigious names like ARM and TI, Cadence Virtuoso AMS Designer won the 2012 Best EDA product award. Five candidates were nominated for this award including Cadence. The award was presented...

a msDmv (Analog Mixed Signal Design and Model Validation) is an application integrated in the Cadence Virtuoso GUI flow and it can also be invoked from command line with some feature limitations. amsDmv can be used to compare the simulation restults and design interface (pins) from the DUT with those from the reference design. Therefore users can use amsDmv to validate behavioral models with original transistor level...

This is the second installment in an ongoing series of blog posts that includes an email conversation between Fred and Harry, two fictional mixed-signal engineers, about analog behiavoral modeling. You can read the first installment by clicking here . (NOTE: This blog post was written by Walter Hartong and uploaded by Paul Foster). Hi Harry, As I said, this was really the fun stuff. We are coming into the region of 1000x...

Introduction This is the first of a series of blogs where we will add pieces to the story over time. This is an email conversation between Fred and Harry, two fictional mixed-signal designers, where Fred is adopting various modeling techniques to realize faster simulations while maintaining acceptable levels of accuracy. (NOTE: This blog post was written by Walter Hartong and uploaded by Paul Foster). How Fred came to...