Measuring Transistor fmax

There were several questions about measuring transistor f_max in comments posted to my previous Measuring Transistor f_t and Simulating MOS Transistor f_t blog posts. So in this posting we will look at simulating transistor s-parameters and device characteristics including f_max, noise, and distortion. There are two parts to the characterizing a device -- creating the testbench and performing the measurement.

First, we will look at creating a testbench to measure transistor s-parameters. While we can't directly use the f_t testbench to measure s-parameters, it will serve as the basis for the s-parameter testbench. The current feedback loop from the f_t testbench will be used to define the transistor's dc operating point. Then we will add ports to the testbench in order to measure the transistor's s-parameters. The ports define the reference impedance and the port number for s-parameter analysis. The complexity is that we need to isolate the current feedback to stabilize the dc operating point from the ports used for s-parameter analysis. To isolate the dc and the ac signal paths, the dc paths include shorts and the ac paths include capacitors. The corner frequency of LC network is set low enough so that frequency sweeps can be performed from frequencies as low as 1Hz (see Figure 1).

 Figure 1: f_max Testbench

Next, let's talk a little bit about how to perform the f_max measurement using Virtuoso Analog Design Environment (ADE). We will use Spectre's s-parameter analysis to simulate the transistor's s-parameters and then calculate f_max from the s-parameter data. We will calculate the f_max from the s-parameters using Mason's Unilateral Power Gain. Let's look at the process step-by-step.

1)       First, we will perform s-parameter analysis. We will start by selecting the input and output ports, in this case port1 and port2.

                     Figure 2: Setting Up s-parameter analysis

2)      In order to improve the accuracy of the measurement, we will use 100 points/decade instead of the default value, 20 points/decade. Increasing the number of points reduces the interpolation error when we make the f_max measurement using the cross() function.

3)      ADE can calculate the Unilateral Power Gain from the device's s-parameters. The Maximum Unilateral Power Gain measurement is available from either of the following options:

a.        From ADE select Results --> Direct Plot --> Main Form..., then in the sp analysis section choose Gumx

                            Figure 3: S-parameter Direct Plot

b.      From ADE select Tools --> Calculator...,  then select gumx from RF functions

4)      In our case, we will use the ViVA Calculator because we want to know the frequency now that the Unilateral Power Gain is 0dB. This measurement can be done using the cross() function. In this case, we have saved Maximum Unilateral Power Gain and the f_max measurement, and the cross(dB10(Gumx() 0 1 "falling" nil nil) as outputs in ADE.

Figure 4: ADE with f_max measurement

5)      If you have ever done the measurement in the lab, you probably did not measure the 0dB crossing -- you extrapolated from a higher level to the 0dB crossing due to measurement noise. Simulating f_max is different than measuring f_max and as a result, when simulating, we can directly measure f_max. We do not need to extrapolate to estimate the 0dB crossing as you would in the lab.

6)      On the other hand, the accuracy of the f_max simulation is affected by how well you model the actual device. For example, using a BSIM4 model with gate resistance, substrate resistance, ...

Once the simulation is complete we can begin to measure the f_max from the G_umx gain plot (see Figure 5).

Figure 5: Calculating f_max from G_umx

Using ADE's Parametric Plotting function (see the Measure Twice, Cut Once post for details) we can sweep the operating conditions and see the effect on f_max (see Figure 6). Designers can use this information to optimize the speed/performance of their design.

Figure 6: f_max vs. collector current

To review, in this post we have looked at how to simulate the f_max of a transistor. This testbench and methodology is based on s-parameter simulation. Any transistor parameter that you might wish to measure using s-parameters can be simulated -- for example, noise figure or IIP3.  

I hope you found this post useful. Please let me know if you have any questions.

Best Regards,

Art Schaldenbrand

Related Resources:

• Virtuoso Analog Design Environment
• Virtuoso ADE Product Suite