Cadence® system design and verification solutions, integrated under our Verification Suite, provide the simulation, acceleration, emulation, and management capabilities.
Verification Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
More Support Log In
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
The Cadence Academic Network helps build strong relationships between academia and industry, and promotes the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence.
Participate in CDNLive
A huge knowledge exchange platform for academia to network with industry. We are looking for academic speakers to talk about their research to the industry attendees at the Academic Track at CDNLive EMEA and Silicon Valley.
Come & Meet Us @ Events
A huge knowledge exchange platform for academia. We are looking for academic speakers to talk about their research to industry attendees.
Americas University Software Program
Join the 250+ qualified Americas member universities who have already incorporated Cadence EDA software into their classrooms and academic research projects.
EMEA University Software Program
In EMEA, Cadence works with EUROPRACTICE to ensure cost-effective availability of our extensive electronic design automation (EDA) tools for non-commercial activities.
Apply Now For Jobs
If you are a recent college graduate or a student looking for internship. Visit our exclusive job search page for interns and recent college graduate jobs.
Cadence is a Great Place to do great work
Learn more about our internship program and visit our careers page to do meaningful work and make a great impact.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
Overview All Courses Asia Pacific EMEANorth America
Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.
Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technology. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Hi can any one show some light on how to perform the solution. For example if i have "M1 drawing layer" visible in LSW , then if i press some bindkey the M1 dummy layer should get vissible. I have tried some code but it isnt working. Copied for reference below
for(i 1 10
x=leIsLayerVisible( list("layer" "drawing") )
if( x == "t" then (
hiSetBindKey("Layout" "Ctrl<Key>8" "showDummySet() ")
I think you need to use leSetLayerVisible instead of leSetEntryLayer, you might want to give that a try.
In reply to chianga:
I was getting this error for both leSetLayerVisible & leSetEntryLayer as
*WARNING* (TECH-2000192): leIsLayerVisible: Invalid layer/purpose - ("layer" "drawing").
I am not able to set the layer as per my wish. So either i have to use a "when" and make the code huge or any other option to sort this out.
In reply to Neeraj Vardhan:
You have quotes around "layer" which means it will be treated as a literal string, rather than the variable you intended. Take these quotes away and you may get it working. (I have not looked in detail at this code, I just noticied this bit).
In reply to skillUser:
Thanks a lot Lawrence, the code is working fine .
I didn't get the error you did - because there's a missing close parenthesis on the first leIsLayerVisible. If I add that, then I get the error you got, because there's an erroneous open parenthesis on the if line. For good measure I declared all the variables in the code as local too - and it now works fine (it did without adding the let, but I though it was a good idea to add):
procedure(showDummySet() let((z layer x) for(i 1 9 z="M" layer=concat(z,i) print(layer) x=leIsLayerVisible(list(layer "drawing")) print(x) if( x == t then leSetLayerVisible(list(layer "drawing") t) leSetLayerVisible(list(layer "slot") t) ) ) ))
Note that we would recommend that you use a prefix for your function to avoid clashing with anyone else's function called "showDummySet".