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Bottom-Top design using Concept HDL..

MAAC

Hi,

I would like to know the Bottom-Top design approach in HLD...or hierarchical design from Bottom to top..???

Which is prefered one Top-Bottom or Bottom-Top??...I could able to do the Top-Bottom design using Concepthdl_tut.pdf from Doc....

How can we do the Bottom-Top design r is there any user guide for the same.(not the Tools-Genview)

 

Thnx

  •  Hi MAAC,

    I typically do bottom>top work. Here is the procedure that I use:

     1. Create a new project. Open the schematic (you'll be at the 'root' page) and go to File > New. This will be your hierarchical block schematic.

    2. Once you're composed the circuitry for the block, leave the nets that go to the ports (pins of the block) dangling.

     3. Go to File Save As to save this schematic page as a Cell. In addition to naming the cell, make sure the View is Schematic. Accept the errors/warnings when saving.

    4.  Add ports to the design and name those nets that leave and hierarchical block. Save again.

    5.  Go to Tools > Generate View. I accept the default settings, click Generate then Done, and close the schematic page. You're now back at the 'root' schematic page.

    6. Using the Component Browser, you can add the hierarchical block from the project's root library like any other component.

    7. Once placed, you can manipulate the block by pulling it up with File > Open. The changes will automatically propogate to the 'root' level.

     

    Is that what you're looking for?

  • How to deal with power pins for the reuse blocks? When I add an outport with the signal name "+5V_USB" to the block, an error appears: Schematic has port but port does not exist in the symbol. Either delete this port from the schematic or add this port in the symbol.

    Does it mean I can't add power port to reuse blocks?

  • This error usually means that since you added an OUTPUT symbol with the signal name "+5V_USB", it needs to see this same logical pin name on the hierarchical block that represents this logical schematic. If you don’t need to bring the "+5V_USB" signal to the hierarchical block symbol, then just remove the OUTPUT symbol attached to the "+5V_USB" signal/wire.

    Jerry
  • Hi Jerry, Thank you so much for your response.

    This error also appears when I modify a reuse module. I want to modify a reuse module that has already been placed into a board layout. When I modify the subdesign schematic and save it, errors appear: ERROR(SPCOHD-168):Schematic has port but port does not exist in the symbol. Either delete this port from the schematic or add this port in the symbol.Then I cannot package the subdesign schematic. I just changed some signal names of the subdesigns. I don't know why these errors exsit even I delete all the modules in the top-level schematic.
    Could you please help me to solve it?

    Thanks.
    Best Regards,
    Samuel

     

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