How to prevent flooding under components?

Question

Hi! 
 I have relatively large SMD ceramic capacitors. Their symbol does not contain a keepout area, which is O.K. I want to prevent the system from filling the whole area underneath the capacitors (except the positive pin + surrounding) with GND plane. I simply have to draw a rectangular shape under the capacitor. How is that shape called? Void, cavity? What is the correct layer: Etch, Anti Etch, something else? 
 
 Kind regards, Manfred

Manfred1 · Answer

It looks like excellon1 provides the answer to my question in this thread: Create an opening in an existing copper pour 
 I must note, that this is very counterintuitive: Voids/Cavities exists in the Design Object Find Filter . One can select (nearly) every combination of Design Objects to select them conveniently. But not voids & cavities ! Why?

excellon1 · Answer

Manfred there is a bit more to using the Route Keepout with symbols aka footprints. 
 In allegro as you are aware it is possible to add a shape to the route keepout class but that does not mean you can route traces through it. 
 Maybe try the following on your symbol that you don't want to have the copper pour flooding under. 
 1 Add a shape Typically a rectangle on the "Route Keep out Top layer of your symbol" Extend this shape so it clears the symbol and pins by a keepout distance you want. 
 2 In the find filter select shape if it is not already selected and hover over the edge of the shape until you see it highlighting. Right click and select properties. 
 Add the following properties to that shape. 
 Vias allowed. Routes allowed. 
 Apply the changes to the shape then save out your symbol. 
 Now your copper pour should clear the symbol and also you will be able to route traces to it. 
 If you decide to mirror that symbol so it is on the bottom layer. The route Keepout will also mirror automatically since it is part of the symbol. 
 Hope that works for you !

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How to prevent flooding under components?

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