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Propagation Delay on PCB track

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Hello Everybody

 I am new to High Speed designing I Working with ATMEL processor and SDRAM. I have a Evalution board ATMEL processor where address and Data lines from processor to sdram are routed with 36 mm. how he calluculated this trace length.(I have knowledge on propagation delay calluculations)


Thanks in advance.

Regards,
N Raghuram

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    Hi,
    The length of high speed lines (min or max) (clock, address or data, strobe) are calculated according to timing simulations. (setup and hold time)
    Matching of a bus, for example 1mm matching in all data signals, is found satisfied timing specs.

    Regards,

    FERHAT YALDIZ

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    I agree with ferhat, in our case we have a simulation team who do the task then they will instruct us on what to do with the wiring (eg length, line widths, wiring layer). If you know how to simulate then it would be a easier task. Good day.

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