Community PCB Design Pulse and DE-HDL Adding detailed SI constraints in schematic netlist

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Adding detailed SI constraints in schematic netlist

Kamilo

Does Cadence support scripting env.,to append detailed SI constraint rules at schematic level, package the netlist + rules and  import it into PCB CAD layout? SI details such as back-drill, layer assignments for family of nets, crosstalk, diff pair geometry, pair-to-pair separation, P & N skew, max trace length, high power nets, etc.?

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