• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. PCB Design & IC Packaging (Allegro X)

PCB Design & IC Packaging (Allegro X)

CDNS Forum PCB Categories

Allegro X PCB Editor

Allegro X Capture CIS

Allegro X System Capture (EE Cockpit)

Allegro X Pulse & EDM

Allegro X APD

Allegro X Scripting - Skill

Allegro X Scripting - TCL

PCB Design Archive

Design Entry HDL

PSpice

Licensing & Installation

  • Leaderboard

    PCB Design

    • 1
      CF202606104231
      CF202606104231 45 Points
    • 2
      Electro Node
      Electro Node 40 Points
    • 3
      avant
      avant 30 Points
    • 4
      SG20260713408
      SG20260713408 20 Points
    • 4
      TL202608111936
      TL202608111936 20 Points
  • Leaderboard

    PCB Design

    • 1
      steve
      steve 15,528 Points
    • 2
      oldmouldy
      oldmouldy 10,615 Points
    • 3
      eDave
      eDave 7,286 Points
    • 4
      DavidJHutchins
      DavidJHutchins 5,231 Points
    • 5
      redwire
      redwire 4,213 Points

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Forum - Thread List

Latest Posts

  • Discussion

    Problem with Assigning ground net names in Capture: AGRD and DGRD

    Category: PCB Design

    By Panama

    •

    updated over 11 years ago by Panama

    2 replies • 15517 views
  • Discussion

    Free Viewer for Allegro 16.2

    Category: PCB Design

    By rpfjj

    •

    updated over 11 years ago by BillAcito

    9 replies • 20547 views
  • Discussion

    SiP Digital Architect, SiP&PCB parallel developing

    Category: Allegro X APD

    By razzob

    •

    started over 11 years ago

    0 replies • 980 views
  • Discussion

    Please Help! how to convert board file from Pads 9.3 to Cadence Allegro 16.3?

    Category: PCB Design

    By gintugaArs

    •

    started over 11 years ago

    0 replies • 13776 views
  • Discussion

    How to get user`s Operating in OrCAD by TCL

    Category: PCB Design

    By Cheeee

    •

    started over 11 years ago

    0 replies • 885 views
  • Discussion

    exported BOM

    Category: PCB Design

    By docb

    •

    updated over 11 years ago by docb

    2 replies • 14658 views
  • Discussion

    Sliding a 45 degree cline into a smt pad.

    Category: PCB Design

    By Lennie

    •

    updated over 11 years ago by steve

    1 replies • 14036 views
  • Discussion

    Disable ratsnest during routing.

    Category: PCB Design

    By Lennie

    •

    updated over 11 years ago by Lennie

    2 replies • 16888 views
  • Discussion

    cannot unfix certain vias.

    Category: PCB Design

    By Lennie

    •

    updated over 11 years ago by B Bruekers

    1 replies • 14575 views
  • Discussion

    Pads with Rounded Corners

    Category: PCB Design

    By Mahiman

    •

    updated over 11 years ago by B Bruekers

    3 replies • 15440 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information