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LC Oscillator - Cadence

rsrk

 Hi

This is could be quite obvious to many of you. Still ...

When I tried to simulate ideal LC oscillator with initial conditions(voltage across the capacitor) using cadence tools ... I realised that output voltage is decaying as time progresses. I mean ... without any series resistance across either capacitor and/or inductor how could I expect output voltage to decay ??

Secondly ... though output voltage is oscillating, I expect voltage across the capacitor, at t=0, to be the one I imposed ... rather in transient analysis I am observing it to be zero. I wanted to be clear as I need to work phase differences.

Could someone throw light on it.

Regards
SRK

Parents

  • Hi Andrew,

     Thanks for your response.
    I am trying to simulate an LC oscillator(image is attached along), both capacitor and inductor are taken from analogLib, with L = 1nH and C = 1pF, with initial condition - forced in "object properties" window - of the capacitor to be 1V.  They are ideal with no series resistance.


    When I did transient analysis simulations for 100ns, I realised that output voltage across the capacitor decayed to ZERO voltage.

    Please revert if I am not clear.

     

Reply

  • Hi Andrew,

     Thanks for your response.
    I am trying to simulate an LC oscillator(image is attached along), both capacitor and inductor are taken from analogLib, with L = 1nH and C = 1pF, with initial condition - forced in "object properties" window - of the capacitor to be 1V.  They are ideal with no series resistance.


    When I did transient analysis simulations for 100ns, I realised that output voltage across the capacitor decayed to ZERO voltage.

    Please revert if I am not clear.

     

Children
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