Please can any one explain me what are 'tiehi' and 'tielo' cells ? and how are they used in designing ?
Thanks & Regards,
In reply to aplumb:
Not all designs use tie cells. I have found this to be a customer preference, although apparently there are benefits to using them, such as some ESD protection.
In a design without tie cells, unused inputs are tied to logic-high or logic-low, and these connections are made by routing the input pin right to the pwr/gnd grid.
In a design with tie cells, unused inputs in the original netlist are tied to logic-high or logic-low, and somewhere during the physical design process, tie cells are inserted. The unused inputs are then connected to a tiehi or tielo cell.
Adding tie cells in Encounter is very easy:
addTieHiLo -cell "TIEHI TIELO"
There are other options to the addTieHiLo command, as well as the setTiHiLoMode command, so please check the docs for your specific needs.
In reply to Kari:
Thank you 'aplumb'.
Thank you so much 'Kari' now am clear about this :-)
Well, tie cells can have even more benefits. But ESD is the main reason. Having the power/ground net connected to a fragile min size gate CMOS transistor is not ideal for high ESD requirements.For example, you can design a tie cell with metal mask programmable 0/1, which can be used for a small ROM in your design. Very practical. I'd recommend adding the tie cells during synthesis. But that's my personal preference.
In RTL Compiler:
insert_tiehilo_cells [-hilo <libcell>] [-hi <libcell>] [-lo <libcell>] [-all] [-maxfanout <integer>] [-verbose] [-skip_unused_hier_pins] [<design|subdesign>]
Make sure you enable -skip_unused_hier_pins as you otherwise may get unnecessary floating tie cells. Use the -maxfanout to define how many gates the tie cell can drive. This is good for reducing the number of tie cells and thus area.
In reply to DaBorg:
Thanks for the suggestion DaBorg :-)..."metal mask programmable 0/1"----> pls can you elaborate on this for me?... am not clear about this part....
Thanks and Regards,
In reply to NAADHAN:
Let's say you need to do an ECO with only one metal mask in order to change a 0 to a 1 on the input of one of your combinatorial gates, but you only have one tie down cell available. If this tie down cell was designed such that you can easily change its function from 0 to 1 by using only one metal layer, then that would be a cost effective change for a localized ECO.
Thanks DaBorg.... now am understood the purpose of metal mask programmable tieCell..