A Brief History of Cadence IP

I actually ran one of the earliest IP businesses, just not at Cadence. When we spun Compass Design Automation out of VLSI Technology, we had the library designers and the library product lines. So that was standard cells, memories, and gate arrays. VLSI kept the larger blocks that went under the name of FSBs for "functional system blocks". We developed a set of standard design rules for each process node, which we marketed under the name Passport. At least in that era, every semiconductor company regarded their design rules as their crown jewels. VLSI's were printed on paper with a big crimson diagonal bar so they wouldn't photocopy for example. Despite this, since they all used the same equipment and materials, the rules were very similar. Passport was designed to run on any process of that generation. I think we were around 1um (1000nm).

I forget when libraries started to be called IP. I think someone decided that if we used the phrase "semiconductor IP" then it would be easier to get royalties, analogous to patent royalties. Then people started to call library elements "IPs" as a noun, which I think is sufficiently ugly that I always say "IP blocks".

Arm was spun out of Acorn in 1990 (read my post Of Arms and the Man I Sing for my story about that) and they were the first microprocessor that you could license. Until then, microprocessors would sometimes have a second company manufacturing them to ensure continuity of supply. Famously, AMD was the second source for some of the early Intel x86 designs. At VLSI Technology, we were the second source for the Hitachi H8. But that model broke the moment chips were big enough that you could embed a processor rather than second-source a standalone chip. As part of the creation of Arm, we got a license to it, too. When the Apple Newton failed, Arm's business plan failed with it. They pivoted to licensing Arm to everyone who wanted it, which turned out to be every semiconductor manufacturer who didn't have a processor family of their own already, and eventually even them.

Compass eventually got competition in the foundation IP business, too, mainly Artisan and Virage Logic. Arm would eventually acquire Artisan, and that technology has developed into the basis of their physical library business today. Of course, many other companies entered the IP business such as Imagination, MIPS, and eventually a large number of IP companies based in India and China.

Cadence's IP Business

Meanwhile, Cadence had no IP business.

In May 2010, that changed with the acquisition of Denali. Denali had started producing what we now call VIP, for verification IP, for DDR controllers. When DDR was introduced, designing an interface was much trickier than it had been with old single data rate controllers, with tighter timing and noise margins. Denali moved from being able to verify DDR interfaces to actually supplying IP blocks for DDR interfaces, a business that Cadence is still a major player in today. That business has grown, driven by the plethora of different xDDRy standards, by the increasing difficulty of designing an interface, and the lack of differentiation (for an SoC company) that comes from rolling its own.

The next IP business acquisition was Tensilica in 2013. Tensilica started building a configurable processor design system called Xtensa, still the underlying technology under all Tensilica processors today. Some groups still use the base technology, but mostly they start from one of the "standard" processors, of which there are four families:

• HiFi DSPs used for audio processing (increasingly nothing to do with HiFi and music, but with voice recognition and voice compression)
• Vision DSPs used for (checks notes) vision processing
• Fusion DSPs used for general-purpose applications
• DNA processors used for neural network and artificial intelligence
• ConnX BBE32EP DSPs and other equally catchily named processors, used for base station and radar processing

In the rest of 2013, Cadence made three more acquisitions in the IP space:

• Cosmic Circuits, who had a silicon-proven analog and mixed-signal portfolio
• The IP division of Evatronix, for mobile and cloud connectivity applications
• Transwitch Corporations high-speed interconnect business: Ethernet, HDMI, DisplayPort, etc

In 2017, Cadence acquired nusemi, designer of very high-speed SerDes interfaces, which forms the basis of our 56G and 112G SerDes interfaces.

In parallel, Cadence developed Denali's VIP into a broad product line covering most interfaces. Today, there are over 100 supported protocols, with 400 customers, 85 memory manufacturers. We are members of 20 protocol standards committees. Thousands of designs have been verified and Cadence is the VIP market leader (but not in IP blocks themselves, that would be Arm by a long way).

Here is Lip-Bu on our latest earnings call just a couple of weeks ago:

On the IP front, the top vertical end-markets for our Design IP in the quarter were hyperscale, enterprise and automotive, with a major hyperscaler adopting our PCIe and high bandwidth memory IP for use in 3nm designs. Tensilica had strong royalties and wins for true wireless stereo and functional safety applications and was adopted by an automotive company for ADAS.

The slide deck that goes with the latest earnings call says IP is 14% of total revenue of $667M for the quarter, making IP ~$93M in Q2.

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