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How Can I Get Out of This House Without Going Anywhere Near Your Garage?

By Paul McLellan | 30 Sep 2016

Go to any venture capitalist's website and they will have a bragging page with their portfolio. Usually not just their current investments but also (especially) major exits. Bessemer Venture Partners is no different. Here is their top exits page. If you think that the name Bessemer sounds like something to do with steel-making, you'd be right. It was set up as a venture arm of Carnegie and named after the Bessemer...

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anti-portfolio | ebay | starbucks | bessemer.google | OVP | venture capital
Linley Gwennap: Specialization Spurs Processor Innovation

By Paul McLellan | 29 Sep 2016

Every year in the fall, the Linley Group runs their processor conference. There are other conferences earlier in the year that are more specialized, addressing servers, mobile, and IoT. The conference, originally called the Microprocessor Forum, has been going since the late 1980s, originally under the umbrella of Michael Slater's Microprocessor Report , then by Cahners, and today by the Linley Group, who still also...

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security | Intel | linley processor conference | AMD | x86 | IoT | Linley | ADAS | ARM | autonomous vehicles | power | Breakfast Bytes
What’s for Breakfast? Preview October 3rd to 7th (video)

By Paul McLellan | 28 Sep 2016

(Please visit the site to view this video) Monday: Options for 5nm. Silicon can only cut off sub-threshold at 60mV/decade. There are two ways to get more, the blue pill and the red pill. Tuesday: Training bytes, 1200 videos to allow self-instruction on many aspects of Cadence tools. Most are under 5 minutes long. Wednseday: The latest Tensilica LX7 processor, and using floating-point for DSP/ Thursday:...

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60mV/decade | SystemVerilog | DSP | tensilica LX7 | CPF | Cadence videos | TSMC | parsers | Tensilica | training bytes | verific | n10 | 5nm | 10nm | ARM | floating point | VHDL | IEDM
Memories Are Made of This: Preview of MemCon

By Paul McLellan | 28 Sep 2016

This year's MemCon is on October 11, at the Santa Clara Convention Center. Last year I wrote about how MemCon got started. But since it was just my fourth blog for Breakfast Bytes, and hardly anyone knew it existed, it wasn't widely read. So I will repeat some of the story here and then provide a preview of this year's conference. A Brief History of MemCon Last year, to find out how it all started, I...

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vertical flash | Memory | LPDDR4 | MemCon | Micron | flash | NAND flash | Denali Party | DRAM | memcon 2016 | Breakfast Bytes
TSMC: Technology Update

By Paul McLellan | 26 Sep 2016

Twice a year TSMC has a big meeting in San Jose. These are the times that there is a public update on their process roadmap, how process ramps are going, the OIP ecosystem, and so on. But they make it hard for people like me since their rules are that they won't hand out the presentations, they won't let you take pictures of the screen, they won't let you video or record the presentations. But I'm allowed...

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OIP | 3D packagin | HPC28 | CoWoS | IoT | 28nm | 20nm | 40ULP | fabless | TSMC | ULP | process roadmap | 55ULP | 16ff | 16nm | InFO | 16FFC | n7 | FinFET | n10 | 7nm | 10nm | foundry
System Design Enablement with Cadence and TSMC

By Paul McLellan | 26 Sep 2016

System-on-chip (SoC) designers are always optimizing what has become known as PPA, which stands for power, performance, and area. Almost always, the most severe constraint is on power. We can put a lot of functionality on a chip and we can clock it very fast. Except that power limitations stop us doing that, making it impossible to use all the transistors on the chip at the same time and impossible to clock the design...

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Low Power | bvp.system-ppa | virtual platform | TSMC | Tensilica | power | Breakfast Bytes
Mellanox: Using Palladium ICA Mode

By Paul McLellan | 23 Sep 2016

At CDNLive Israel, Yaron Netanel of Mellanox talked about his experience with Palladium ICA mode. ICA stands for in-circuit acceleration. One basic way of using Palladium is in-circuit emulation or ICE. In this method, the DUT is modeled on the Palladium emulator, and it is connected to real hardware via one or more SpeedBridge interfaces. There are several pluses to this approach, in particular that the real hardware...

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Yaron Netanel | CDNLive | debug | mellanox | Palladium | in-circuit acceleration | ICA | cdnlive israel | Breakfast Bytes
What’s for Breakfast? Preview September 26th to 30th (video)

By Paul McLellan | 22 Sep 2016

(Please visit the site to view this video) Monday: System Design Enablement with Cadence and TSMC. Archtiectural power analysis Tuesday: The keynotes from TSMC OIP Symposium last week Wednesday: A preview of next month's MemCon Thursday: The keynotes from the Linley Microprocessor conference Friday: A look at the Bessemer Venture Anti-portfolio

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OIP | Memory | MemCon | LPDDR | liinley | sde | TSMC | antiportfolio | DDR | system design enablement | bessemer ventures | power | microprocessor
How to Connect Sensors with I3C

By Paul McLellan | 22 Sep 2016

A couple of sessions at MIPI DevCon last week were on I3C. This is a new generation based on the old I 2 C standard. Confusingly, the old standard is pronounced "eye-squared-see" but the new one is "eye-three-see". I 2 C History The I 2 C network was developed by Philips Semiconductors in the early 1980s. It was largely intended to reduce the cost of televisions, which Philips Consumer Electronics...

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MIPI | i2c | sensors | mobile | I3C
שלום from CDNLive Israel

By Paul McLellan | 21 Sep 2016

Shalom. Today is CDNLive Israel in Tel Aviv. At least getting here from San Francisco has got easier, since United now has direct flights three days a week. But for locals, it is not so easy: Commuters traveling to Tel Aviv, Israel’s commercial hub, are expected to face vast traffic logjams over the next eight days as Israel Railways carries out major repair and upgrade work on the tracks leading into the city...

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CDNLive | Lip-Bu Tan | cdnlive israel | perlmutter
MIPI: Not Just Mobile Any More

By Paul McLellan | 20 Sep 2016

On September 14 and 15, MIPI held its first developer conference. For more background, see my posts Cadence's History with MIPI and MIPI SoundWire . There were two keynotes on the first day. The first was by Linley Gwennap of the Linley Group. This covered much of the same ground as his keynote at the recent Linley Mobile and Wearables Conference, so I won't cover it again here. You can read my posts Smartphones...

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5G | automotive | 4G | CSI-2 | Standards | MIPI | mipi devcon | ADAS | I3C | Breakfast Bytes
Signal and Power Integrity Masterclass

By Paul McLellan | 19 Sep 2016

At CDNLive Boston, I moderated a panel session on signal and power integrity with a panel of five true experts on the topics. They work on some of the highest performance systems out there. It was a double-length session, taking up two slots at the end of the day. The four customers spent about ten minutes each going over their position on some aspect of power integrity and signal integrity. We did a little advance...

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DDR4 | CDNLive | dc-dc converters | IBM | Cisco | Oracle | cdnlive boston | advanced bus analysis | Qualcomm | compliance methodology
Are These Codecs Any Good? Netflix Tests Them

By Paul McLellan | 16 Sep 2016

A codec compresses data for transmission. The first codec I had any close encounter with was the full-rate speech coder used in GSM. This compressed voice into 13kb/s. For comparison, wired phones transmitted uncompressed data at 56kb/s (US) or 64kb/s (most of rest of world). Codecs By modern standards, the full-rate codec is poor, both in terms of the quality of the speech (music-on-hold was dreadful) and in terms...

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GSM | audio codec | H.265 | codec | netflix | mobile | h.264 | video codec | Breakfast Bytes
What’s for Breakfast? Preview September 19th to 23rd (video)

By Paul McLellan | 15 Sep 2016

(Please visit the site to view this video) Monday: At CDNLive Boston I moderated a panel session with east coast experts on Signal and Power Integrity. Tuesday: I present the highlights of MIPI's first developer conference, as MIPI transitions from being mobile-only to starting to address markets beyond mobile, such as IoT and automotive. Wednseday: I will be at CDNLive Israel which takes place on Monday...

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cdnlive tel aviv | Paul McLellan | CDNLive | debug | mellanox | VIP | MIPI | power integrity | i2c | cdnlive boston | mipi devcon | Indago | signal integrity | cdnlive israel | I3C | what's for breakfast? | protocol verification | Breakfast Bytes | verification
Emulation Productivity: Beyond the Specs

By Paul McLellan | 15 Sep 2016

At CDNLive in Boston, Andrew Ross of AMD presented a wealth of practical information about how best to use emulation. He broke things down into four main areas: hardware systems, workflow, stimulus, and design. He pointed out that there are really two phases in using an emulator: bringing up the design and getting it functional, and perhaps tuning it. Then running the tests. And then the next code drop arrives and...

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CDNLive | palladium z1 | Protium | Palladium | cdnlive boston | Emulation | FPGA prototyping | Breakfast Bytes
Everything That's New About Ethernet

By Paul McLellan | 14 Sep 2016

IEEE 802.3 is the standard number for various flavors of Ethernet. With Ethernet constantly increasing its speed for use in data centers, Ethernet moving into vehicles, power over Ethernet, and Ethernet over various media, there is a lot of work going on. In July, there was a plenary meeting in San Diego that Cadence attended. I realize not many of you are that interested in Ethernet standardization task forces. Me...

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Ethernet standards | Ethernet | 802.3 | IEEE | Breakfast Bytes
DARPA: All Must Have Prizes

By Paul McLellan | 13 Sep 2016

At CDNLive Boston, the invited keynote was by Dr. Bill Chappell of DARPA's Microsystems Technology Office. Since he took the position in mid-2014, he has focused the office on three key thrusts important to national security. These thrusts include ensuring unfettered use of the electromagnetic spectrum, building an alternative business model for acquiring advanced DoD electronics that feature built-in trust, and developing...

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CDNLive | cdnlive boston | robotics | autonoous vehicles | craft | microsystems technology office | darpa
Electronic Design Automation Handbook

By Paul McLellan | 12 Sep 2016

Way back in 2006, Luciano Lavagno, Lou Scheffer, and Grant Martin, all then at Cadence, edited a two-volume book on EDA. The first volume covered EDA for IC System Design, Verification and Testing. The second volume covered EDA for IC Implementation, Circuit Design, and Process Technology. The first volume was over 500 pages, the second over 600, so it was a comprehensive work. Now, ten years later, they have produced...

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TCAD | Electronic Design Automation | system design | EDAC | Testing | implementation | Circuit Design | process design | Breakfast Bytes | verification | book
Facebook's Aquila Flies...and OpenCellular

By Paul McLellan | 9 Sep 2016

In Barcelona in February I attended a "keynote' with Mark Zuckerberg which was actually an on-stage interview. To read what I said about it then, look at MWC: Zuckerberg Interview . One of the points he made there is that half the world needs things like 5G so that we can have nice things like virtual reality. But we must not forget the other half of the world which doesn't yet have the internet at all. There...

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aquila | Facebook | opencellular | zuckerberg | internet.org
What’s for Breakfast? Preview September 12th to 16th (video)

By Paul McLellan | 8 Sep 2016

(Please visit the site to view this video) Monday: My review of Electronic Design Automation for IC System Design, Verification and Testin g, and Electronic Design Automation for IC Implementation, Circuit Design and Process Technology . This is the second edition of the two volume set written by Cadence employees. Tuesday: The invited keynote from CDNLive Boston was by Dr Bill Chappell of DARPA's Microsystems...

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CDNLive | palladium z1 | AMD | H.265 | IEEE 802.3 | cdnlive boston | Ethernet | Emulation | codec | netflix | h.264 | vp9 | video codec | darpa
Cadence's History with MIPI

By Paul McLellan | 8 Sep 2016

I talked last week to Kevin Yee, Sachin Dhingra, and Moshik Rubin about the history of MIPI, Cadence's involvement with MIPI, and the upcoming MIPI DevCon that will take place on September 14 and 15 at the Computer History Museum in Mountain View. Steve Brown has already written MIPI DevCon 2016 – Mobile and Beyond about Cadence's involvement in MIPI DevCon, so I won't repeat all the same information...

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automotive | MIPI | mipi devcon | mobile
SiFive: a RISC-V Fabless Semiconductor Company

By Paul McLellan | 7 Sep 2016

A couple of weeks ago I talked to Krste Asanović and Jack Kang of SiFive. Jack is the VP of product and business development. Krste is the chief architect, and, of course, the leader of the team at UC Berkeley that defined the RISC-V ISA (although he is currently on leave-of-absence from Cal), and the chairman of the RISC-V foundation. Jack has a semiconductor background from NVIDIA and Marvell. Other co-founders of SiFive...

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risc-v | fabless | sutter hill ventures | freedom unleashed | freedom everywhere | sifive | foundry
CDNLive Boston Overview

By Paul McLellan | 5 Sep 2016

CDNLive Boston took place last week. It is really CDNLive East Coast, and there were plenty of people who had come from further afield, such as Florida and North Carolina. I came from California, along with many of the corporate marketing team that run the event. Keynotes The day opened with three keynotes. The first was by Daryn Lau, who runs R&D for emulation and FPGA prototyping. He gave his version of what...

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CDNLive | power integrity | cdnlive boston | signal integrity | Breakfast Bytes
RISC-V Gathering Momentum

By Paul McLellan | 2 Sep 2016

I've been writing quite a bit about RISC-V (pronounced "risk five") since I think that it is going to turn out to be very significant, although it is still early days. However, momentum is truly building behind the instruction set architecture (ISA). A week or so ago I talked to Krste Asanović, who is the UC Berkeley professor who led the project to define RISC-V, chairman of the RISC-V foundation, and in...

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krste asonovic | risc-v | codasip | NVIDIA | google | andes | cortus | Breakfast Bytes | sifive | hp enterprise
Happy Birthday, HP 12c—35 Years and Counting

By Paul McLellan | 1 Sep 2016

Last year was the 50th anniversary of Moore's Law. One consequence of Moore's Law has been that computers got significantly faster on a regular basis. Until comparatively recently, when computers by and large were all "fast enough", we would all replace our computers and smartphones every couple of years. The idea that an electronic product even 10 years old would still be on sale seems almost comical...

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hewlett-packard | hp 12c | CMOS | hp12c | calculator | Breakfast Bytes

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