Cadence Community

Sunday Brunch Video for 16th June 2019

By Paul McLellan | 16 Jun 2019

https://youtu.be/CaIc3qOakxs Made at building 9 elevator (camera Sean) Monday: Cadence Cloud Passport Partner Program Tuesday: Making Trouble in Las Vegas Wednesday: Paris Air Show Thursday: Ericsson Using Virtual Platforms for Dynamic Analysis ...

0 Comments

TAGS:

sunday brunch
Cell-Aware Test: Research Cooperation Between Cadence, imec, and TU Eindhoven...Now Shipping in Modus DFT Software Solution

By Paul McLellan | 14 Jun 2019

At CDNLive EMEA, Zhan Gao presented her results on cell-aware test. This is the paper she presented at the Latin American Test Symposium (LATS) in Santiago, Chile in March and won the Best Paper award there (see Anton's post on the Academic Network b...

0 Comments

TAGS:

Cadence Academic Network | modus | imec | cell-aware test
Ericsson Using Virtual Platforms for Dynamic Analysis

By Paul McLellan | 13 Jun 2019

At CDNLive EMEA last month, Ola Dahl of Ericsson presented Dynamic Software Analysis in Virtual Platforms. He described his job as "I work in the 5G network business doing basestations and radios." They have a virtual platform for one of th...

0 Comments

TAGS:

CDNLive | virtual platform | CDNLive EMEA | Ericsson
Paris Air Show

By Paul McLellan | 12 Jun 2019

Next week it is the Paris Air Show, the biggest trade show in aerospace and defense. Cadence will be attending for the first time. The show is held at Le Bourget Airport, which you've probably never heard of. Although it was Paris's first air...

0 Comments

TAGS:

protium x1 | Aerospace | palladium z1 | Emulation | FPGA prototyping | paris air show
Making Trouble in Las Vegas

By Paul McLellan | 11 Jun 2019

For years John Cooley has organized what is called the Cooley's DAC Troublemaker Panel. This year, the participants (troublemakers?) were: Naveed Sherwani, CEO of SiFive (a RISC-V implementation company) Joe Costello of Montana (creati...

0 Comments

TAGS:

DAC | troublemaker | 56dac
Cadence Cloud Passport Partner Program

By Paul McLellan | 10 Jun 2019

Last year at DAC, Cadence announced Cadence Cloud (see my post Cadence Cloud from that day for details). Since then we have announced CloudBurst (see my post CloudBurst: The Best of Both Worlds for those details), and various other foundry-based...

0 Comments

TAGS:

passport partner program | cadence cloud
Sunday Brunch Video for 9th June 2019

By Paul McLellan | 9 Jun 2019

https://youtu.be/T8nSP-oElJM Made at Design Automation Conference (camera Sean) Monday: Spectre X: Same Accuracy, New Speed Tuesday: DAC Monday: Gaming, IoT Security, State of EDA Industry, Mixed-Signal Lunch, Cooley's Troublemakers Wed...

0 Comments

TAGS:

sunday brunch
1984 Was Published 70 Years Ago

By Paul McLellan | 7 Jun 2019

If you work in any aspect of tech, one book that you have to have read is George Orwell's 1984. Aspects of the impact of technology on life are always being compared to things in the book. For example, Big Brother watches everyone through TV scre...

0 Comments

TAGS:

george orwell | 1984
DAC Wednesday: Verification Lunch, Books, and Bagpipes

By Paul McLellan | 6 Jun 2019

For my coverage of the first two days of DAC, see my posts DAC Monday: Gaming, IoT Security, State of EDA Industry, Mixed-Signal Lunch, Cooley's Troublemakers , and DAC Tuesday: Thomas Dolby, the View from Wall Street, AI Lunch, Denali . Verifica...

0 Comments

TAGS:

DAC | 56dac | Design Automation Conference
DAC Tuesday: Thomas Dolby, the View from Wall Street, AI Lunch, Denali

By Paul McLellan | 5 Jun 2019

It was the second day of DAC yesterday. If you were here, you probably saw some of these main events. If not, then read on. I'll tell you what you missed. Thomas Dolby The keynote was Thomas Dolby, probably most famous for his single "She Blinded Me ...

0 Comments

TAGS:

DAC | 56dac | Design Automation Conference
DAC Monday: Gaming, IoT Security, State of EDA Industry, Mixed-Signal Lunch, Cooley's Troublemakers

By Paul McLellan | 4 Jun 2019

The Design Automation Conference is in Las Vegas this year. If you are here and want my recommendations, then see my post Top 10 Reasons to Go to DAC . If you are not here, and want to know some of what you missed, then this post covers a lot of what ...

0 Comments

TAGS:

DAC | 56dac | Design Automation Conference
Spectre X: Same Accuracy, New Speed

By Paul McLellan | 3 Jun 2019

This morning at DAC, Cadence announced the Spectre X Simulator, the latest version of its circuit simulation product. The short value proposition is up to 10X speed improvement, up to 5X capacity improvement, the same golden accuracy. So the same res...

0 Comments

TAGS:

Circuit simulation | Spectre | cadence cloud | spectre x
Sunday Brunch Video for 2nd June 2019

By Paul McLellan | 2 Jun 2019

https://youtu.be/T2VZUEW1ucc Made at Protium Hardware Lab (camera Sean) Monday: Memorial Day Tuesday: Protium X1: FPGA Prototyping for the Enterprise Wednesday: Verific, 20 Years Terrific Thursday: Embedded Vision: Seeing Round Corners, and...

0 Comments

TAGS:

sunday brunch
ESD Alliance CEO Outlook: The Leading Edge, Chiplets, Design Costs, Security, and More

By Paul McLellan | 31 May 2019

The ESD Alliance (and, before that, its forerunner EDAC) runs a CEO Outlook panel one evening every spring. Originally, it was focused on the CEOs of the big EDA companies giving an outlook, but since one of them was always in its quiet period, and t...

0 Comments

TAGS:

ceo outlook | esd alliance
Embedded Vision: Seeing Round Corners, and Reasoning on Microcontrollers

By Paul McLellan | 30 May 2019

May is a month that seems to have many things associated with it. "Sell in May and go away," people who work in the financial sector will tell you. Or "I thought that spring must last forevermore; For I was young and loved, and it was ...

0 Comments

TAGS:

deep learning | Embedded Vision Summit | google | mit media lab | neural network
Verific, 20 Years Terrific

By Paul McLellan | 29 May 2019

What do JasperGold, Stratus, and the Rocketick part of Xcelium have in common? Well, they are all Cadence products, of course. But they also all use Verific as parsers for SystemVerilog, Verilog, and VHDL. Verific got started twenty years ago, Rob De...

0 Comments

TAGS:

verific | Stratus | JasperGold
Protium X1: FPGA Prototyping for the Enterprise

By Paul McLellan | 28 May 2019

Today Cadence announced the new Protium X1 Enterprise Prototyping Platform. The previous version, the Protium S1 Desktop Prototyping Platform, was the size of a small refrigerator and intended to be beside an engineer's desk. The Protium X1 platform,...

0 Comments

TAGS:

protium x1 | System Design and Verification | FPGA prototyping
Sunday Brunch Video for 26th May 2019

By Paul McLellan | 26 May 2019

https://youtu.be/mx1i55BxSTU Made at Cadence campus (camera Sean) Monday: Alberto and the Origins of the EDA Industry Tuesday: Samsung's 3nm GAA Process Wednesday: I/O Is Faster Than the CPU—What Now? Thursday: GOMAC: Software Is...

0 Comments

TAGS:

sunday brunch
Off-Topic: Syllepsis and Zeugma

By Paul McLellan | 24 May 2019

It's Memorial Day in the US on Monday, and Cadence is off. So today is the day before a holiday. By tradition, I write about...whatever I feel like. So let's go with figures of speech. Even before I became a professional writer, I had a fasci...

0 Comments

TAGS:

offtopic
GOMAC: Software Is Never Done

By Paul McLellan | 23 May 2019

When I was at GOMAC in Albuquerque at the end of March, I ran into a couple of Cadence people and a couple of Green Hills people. Everyone left except one of the Green Hills guys, since he was staying in a different hotel. He turned out to be John Wa...

0 Comments

TAGS:

automotive | dod | software | software development
I/O Is Faster than the CPU—What Now?

By Paul McLellan | 22 May 2019

At his keynote at CDNLive Silicon Valley, Andy Bechtolsheim made a throwaway remark that 1600G Ethernet would be a problem since "the packet rate is just 333 picoseconds so that needs wide Ethernet ports" (see my post Andy Bechtolsheim...

0 Comments

TAGS:

parakernel | networking | nic
Samsung's 3nm GAA Process

By Paul McLellan | 21 May 2019

At the recent Samsung Foundry Forum, HK Kang, the EVP of semiconductor R&D, took to the stage. He's in charge of advanced logic, DRAM, 3D NAND, mask. But that day he was just going to talk about Samsung's 3nm gate-all-around (GAA) technol...

0 Comments
Alberto and the Origins of the EDA Industry

By Paul McLellan | 20 May 2019

At the 2019 International Symposium of Physical Design, the conference honored Alberto Sangiovanni-Vincentelli with a lifetime achievement award. Alberto was one of the cofounders of SDA Systems, the forerunner of Cadence, so in some ways he's a foun...

0 Comments

TAGS:

Alberto | SDA
Sunday Brunch Video for 19th May 2019

By Paul McLellan | 19 May 2019

https://youtu.be/cTEPUNpqcRg Made at Samsung HQ (camera Sean) Monday: Bob Smith on ESD Alliance, ES Design West...with Wine Tuesday: After Meltdown and Spectre Wednesday: Vision Q7 DSP: Real-Time Vision and AI at the Edge Thursday: Samsung ...

0 Comments

TAGS:

sunday brunch
Top 10 Reasons to Go to DAC

By Paul McLellan | 17 May 2019

The Design Automation Conference is coming up soon. It's in Las Vegas from June 2 to 6 in the Las Vegas Convention Center (LVCC). Rob Aitken I was putting together a post on what I thought were good reasons to attend, but I decided to c...

0 Comments

TAGS:

DAC | cadence cloud

Breakfast Bytes Blogs