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Bagels and Brains: SEMI's Artificial Intelligence Breakfast

By Paul McLellan | 13 Nov 2018

A couple of weeks ago the Silicon Valley chapter of SEMI held a breakfast meeting Artificial Intelligence at the Edge. There were 5 presentations: Kevin Krewell of TIRIAS Research: There Is No One-Size-Fits-All in ML at the Edge. Dave Pellerin ...

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Intel | semi | machine learning | aws | Amazon | xilinx | ARM | AI
Portable Stimulus and Correct Designs

By Paul McLellan | 12 Nov 2018

The title of this post seems pretty generic, after all who wouldn't want correct designs. But actually Correct Designs is the name of a company. They have been working closely with Cadence on PSS, the Accellera Portable Stimulus Standard, and Perspec...

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correct designs | Perspec | Accellera | pss
Sunday Brunch Video for 11th November 2018

By Paul McLellan | 11 Nov 2018

https://youtu.be/deyk_MEkjZg Made at Cadence Diwali Celebration (camera Sean) Monday: China Update Tuesday: Automotive Summit: Driving an Industry with Electronics Wednesday: IEDM Preview: 3nm and More Thursday: RISC-V Summit Preview:...

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automotive | risc-v | China | Kaufman Award | IEDM
Kaufman Award Dinner: The Tom Williams Story

By Paul McLellan | 9 Nov 2018

Wednesday night it was the annual Kaufman Award Dinner to honor this year's recipient, Tom Williams. To learn more about the history of the award, read my post Who Was Phil Kaufman? I also talked to Tom Wiliams in Italy last month, when the ...

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kaufman dinner | scan | Scan test | IBM | Kaufman Award | tom williams | lssd | synopsys
RISC-V Summit Preview: Pascal or Linux?

By Paul McLellan | 8 Nov 2018

Coming up in December, in the same week as IEDM, is the RISC-V Summit at the Santa Clara Convention Center. For a basic introduction to RISC-V see my post RISC-V—Instruction Sets Want to Be Free. It is clear that RISC-V is already bec...

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risc-v | Spectre | instruction set architecture
IEDM Preview: 3nm and More

By Paul McLellan | 7 Nov 2018

A lot of aspects of EDA and semiconductor are fairly easy to predict: you read off the process roadmap for the big guys and work out the implications for tools, IP, and methodology. Of course, it is harder back away from the leading edge since t...

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IBM | 3nm | Samsung | imec | gaa | tu dresden | IEEE | IEDM
Automotive Summit: Driving an Industry with Electronics

By Paul McLellan | 6 Nov 2018

Coming up on November 14th is the Cadence Automotive Summit. This will be held on the Cadence campus (2655 Seely Avenue, San Jose if you need a street adress for your map app). The day starts with registration and breakfast at 8.30am and wraps ...

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automotive | lidar | radar | Tensilica | vision | ISO 26262 | ADAS | ARM
China Update

By Paul McLellan | 5 Nov 2018

Over the last couple of weeks, I came across various little things about China, none of which justified a blog post all on their own, but it seems a good time to give an update on what's going on over there. I consider China to be the biggest story i...

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China | Micron | semi | DRAM | ic insights | bloomberg
Sunday Brunch Video for 4th November 2018

By Paul McLellan | 4 Nov 2018

https://youtu.be/HCJG-tABZWE Made at Linley Fall Processor Conference (camera Sean) Monday: Formal Signoff with JasperGold Tuesday: Texas Instruments on Automotive Reliability Wednesday: "Alexa, What is HiFi 5?" Thursday: Yoga is Pass&...

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automotive | hifi 5 | curvycore | formal | openroad | Tensilica | photonics | Texas Instruments | JasperGold | darpa
ERI: OpenROAD

By Paul McLellan | 2 Nov 2018

If I had to summarize DARPA's Electronic Resurgence Initiative in one phrase, it would be "getting the cost of design down." As I've said several times this week, the US Department of Defense (DoD) does not have high volumes an...

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openroad | kahng | open source | eri | darpa
Yoga is Passé, the Future Is CurvyCore

By Paul McLellan | 1 Nov 2018

Despite CurvyCore sounding like something that you might take classes in at your local gym, it is actually new technology that allows computing and representing non-Manhattan shapes in Virtuoso. The CurvyCore technology is targeted at a wide range of...

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curvycore | conformal routing | Virtuoso | photonics
"Alexa, What Is HiFi 5?"

By Paul McLellan | 31 Oct 2018

"Alexa, turn on the living room light." "Okay." "Alexa, what is Cadence announcing on Halloween morning?" "The Tensilica High Five! Yay." "Alexa, it's the Tensilica HiFi 5 DSP." "O...

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hifi 5 | alexa | audio | voice recogntion | Tensilica
Texas Instruments on Automotive Reliability

By Paul McLellan | 30 Oct 2018

Recently, I seem to have been running into people from Texas Instruments (TI) talking about various aspects of automotive reliability. I'm going to try and summarize three presentations that I attended in this post: Functional Safety Fault-Injection...

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automotive | electromigration | functional safety | aging | Texas Instruments | fusa | reliability
Formal Signoff with JasperGold

By Paul McLellan | 29 Oct 2018

At the recent Jasper User Group, I said that there were several themes. For overall coverage of the event, see my post Jasper User Group 2018 . One was post-silicon debug, which I wrote about in the post Formal Post-Silicon Debug . Another theme w...

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Jasper User Group | JUG | formal | signoff | JasperGold
Sunday Brunch Video for 28th October 2018

By Paul McLellan | 28 Oct 2018

https://youtu.be/1vU3sg3QlWc Coming from building 8 lab (camera Sean) Monday: The World's First Working 7nm 112G Long Reach SerDes Silicon Tuesday: Arm TechCon: Get Ready for the NEOVERSE Wednesday: ERI: Hardware Security Work...

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security | ARM Techcon | Jasper User Group | chiplets | formal | Jasper | 112g | SerDes | ARM | darpa | chips
ERI: CHIPS and Chiplets

By Paul McLellan | 26 Oct 2018

One of the DARPA programs that is part of the Electronic Resurgence Initiative (ERI) is called CHIPS. This stands for Common Heterogeneous Integration and IP Reuse Strategies. In fact, the CHIPS program started before ERI existed, so I'm not enti...

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chiplet | eri | darpa | chips
Formal Post-Silicon Debug

By Paul McLellan | 25 Oct 2018

Two outstanding presentations at the recent Jasper User Groiup were on using JasperGold (JG) for post-silicon debug. The two presentations were from Laurent Arditi of Arm, In Case of Emergency Call 1-800-FORMAL and from Jim Kasak of HP Ente...

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Jasper User Group | JUG | JasperGold
ERI: Hardware Security Workshop

By Paul McLellan | 24 Oct 2018

The opening morning of DARPA's Electronic Resurgence Initiative summit in San Francisco consisted of several workshops, called "What's Next Workshops". I picked the hardware security workshop since the DoD cares more about security ...

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security | eri | darpa
Arm TechCon: Get Ready for the NEOVERSE

By Paul McLellan | 23 Oct 2018

I don't know if it was the vibe Arm's marketing was going for, but if you wanted to evoke The Matrix without infringing any copyrights, The NEOVERSE does the trick. It's hard to believe but The Matrix will be twenty years old next ye...

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ARM Techcon | softbank | arm neoverse | ARM
The World's First Working 7nm 112G Long Reach SerDes Silicon

By Paul McLellan | 22 Oct 2018

At the start of November last year, Cadence announced that it was acquiring nusemi, a company focused on the development of high-speed SerDes interfaces. Today, Cadence demonstrated working 7nm SerDes testchips running at 112 Gbps. It ...

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pam4 | 112g | semiconductor IP | SerDes | 7nm | datacenter
The DARPA Electronic Resurgence Initiative (ERI)

By Paul McLellan | 19 Oct 2018

Many weeks ago DARPA organized a summit at the Palace of Fine Arts in San Francisco. The first day consisted of a workshop and some other presentations, including one by Cadence's Tom Beckley. Since Tom's presentation was very similar to what he...

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openroad | magestic | idea | posh | eri | darpa
CDNLive Israel 2018

By Paul McLellan | 18 Oct 2018

This week it was the last CDNLive of the year, CDNLive Israel in Tel Aviv. From my point of view the show ran perfectly. But I'm always reminded of that description of a swan as "serene on top and furiously paddling underneath." I reali...

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Jasper User Group 2018

By Paul McLellan | 17 Oct 2018

This week it is CDNLive Israel. But last week it was Jasper User Group (JUG). At it happens, Jasper was one of the early companies to sign up with SemiWiki when we started it, so I've been going to Jasper User Group for longer than either I'v...

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Jasper User Group | formal | formal signoff | JasperGold | Formal verification
Of Arms and the Man I Sing

By Paul McLellan | 16 Oct 2018

Arma virumque cano—of arms and the man I sing. This is the famous opening line of Virgil's Aeneid, the curse of many a schoolboy's Latin learning days, mine included. Anyway, the reason for all this talk about arms (Arma) is that today is ...

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ARM Techcon | arm datacenter | hpe | xcelium | ARM | JasperGold | verification
DDR5 Is on Our Doorstep

By Paul McLellan | 15 Oct 2018

The talk of the town in the DRAM market (well, apart from its growth in the last couple of years) is DDR5. You might assume from the talk that JEDEC has finalized the standard, but it is actually technically still in development. I believe that the f...

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OIP | ddr5 | DDR4 | Micron | TSMC | DRAM

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