Arm V9A

Yesterday, I wrote about rapid adoption kits (RAKs) for the latest Arm server-class processors. But it is only a few weeks ago that Arm announced the latest iteration of its instruction set architecture (ISA), V9A.

It is obviously an exaggeration to say that there are only three important ISAs in the world: x86, Arm, and RISC-V. There are lots of other ISAs in wide use such as Power (used in some IBM mainframes), MIPS (despite MIPS now being a RISC-V company, it seems), various specialized processors for automotive (V850 from NEC now Renesas; Infineon TriCore), various DSPs such as Tensilica (that would be from Cadence), and more.

But the big three are:

• x86: Despite Arm making some inroads into data centers in the form of AWS Graviton, Marvell, Ampere, maybe Microsoft, the reality on the ground is that something like 98% of all code in data centers and laptops is run on x86 chips from Intel and AMD. One thing that may be important in the medium term is that Intel has said that it will make x86 cores available as IP for its foundry business, so it will be possible for system companies to build their own SoCs around x86, which was not possible in the past.
• Arm: Almost all mobile phones are based on Arm for the application processor, the one where the instruction set is exposed to the user (or at least the app developers). Arm is also, as I said above, making inroads into the data center, and obviously making inroads into Apple Macs (and, last week, other parts of the Apple product line);
• RISC-V: RISC-V is already dominant in academia, both on the education side and also on the research side, especially in security and cryptography, which requires complete openness for analysis. But there are inroads being made in industry too, with Western Digital all-in and SiFive now taping out a core in 5nm, the most advanced process node in high-volume manufacturing.

Arm V9

Arm's current ISA is known as V8 and was introduced in 2011, a decade ago.

At the end of March, at its Arm Vision Day, it announced Arm V9 (actually V9A since there will undoubtedly be revisions over the next decade). There is a video at the end of this post in which Arm's Chief Architect and Fellow, Richard Grisenthwaite goes into the details.

The four bullet summary of the major changes that Arm emphasized are:

• Security ("realms")
• New Scalable Vector Extension SVE2
• AI capabilities
• Backward compatibility with V8 (so V8 code will run on V9 processors, but not vice versa)

Security

Richard gives his view on security (quoting from the video):

In my view, security is the greatest challenge that computing needs to address.

The biggest issue that the new architecture is designed to address is security, or as Arm likes to put it, "securing the world's data". This is based around a new concept that Arm calls "realms":

To address the greatest technology challenge today, the Armv9 roadmap introduces the Arm Confidential Compute Architecture (CCA). Confidential computing shields portions of code and data from access or modification while in-use, even from privileged software, by performing computation in a hardware-based secure environment. The Arm CCA will introduce the concept of dynamically created realms, useable by all applications, in a region that is separate from both the secure and non-secure worlds. For example, in business applications, realms can protect commercially sensitive data and code from the rest of the system while it is in-use, at rest, and in transit. In a recent Pulse survey of enterprise executives, more than 90% of the respondents believe that if Confidential Computing were available, the cost of security could come down enabling them to dramatically increase their investment in engineering innovation.

There is more detail about how realms are designed to work in the video at the end of this post.

Vector Extension

The other area with a big update is the SVE (Scalable Vector Extension) and the introduction of an extended version SVE2, with vectors going up to 2048 bits wide. The original SVE was introduced in 2016 and SVE2 in 2019. The first implementation was in the Fujitsu chip inside the Fugaku supercomputer, but the new more scalable SVE2 extends the capability from HPC applications to DSP applications.

AI

The third big change in V9 is the addition of artificial intelligence (AI) capabilities. Obviously, a lot of machine learning (ML)will run on offload processors of one sort or another (in fact much of last week's Linley Processor Conference was about such processors). But also a lot will run on the main processor, especially when ML is not the heart of what is being done. For example, Xcelium ML has machine learning under the hood but wouldn't benefit from an offload processor since mostly it is doing simulation. However, classifying a million photographs would almost certainly be a lot more efficient with an offload vision processor of some sort.

Watch the Video

Watch Arm's Chief Architect and Fellow, Richard Grisenthwaite goes into the details of the key features of the V9 instruction set and developments that are expected over the next decade. The video is 45 minutes long, so get a coffee.

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