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Cadence's new Sigrity Aurora puts all the power of the Sigrity engines under the Allegro user experience. The new capability allows a team to go from preliminary exploration, through design, to final verification and signoff, all in the context of the Allegro environment. This means you can access the design data without needing to copy the design in and out of two different environments.
There has been a signal integrity analysis engine under the hood in Allegro since 1990, before Cadence acquired Sigrity. However, there is something called Segal's Law that says that "A man with a watch knows what time it is. A man with two watches is never sure." Having two signal integrity engines, one integrated into the tool, and one standalone for signoff, was like having two watches. When they told a different time, or showed a different voltage, you were never sure which to believe. Now Allegro has the best signal integrity analysis engines delivering to users in-design analysis.
In the early stage of design, people want to do what-if analysis to make sure that what they plan to design is going to work. You can perform impedance and coupling checks, return path checking, reflection and crosstalk analysis, IR drop for power integrity analysis, and there is a new topology explorer for pre-route and signal net extraction. This is schematic-based. It is also possible to inject noise into the power plane instead of using "ideal" power supplies.
Each block in the system can be built with Sigrity or Clarity technology. This allows end to end analysis of the whole path: for example, from a chip, through the board, through a connector to a cable, to another connector, to another board, and finally to the receiver. (For more information on Clarity, see my post from when we announced the product Bringing Clarity to System Analysis. For more details on some of Sigrity's capabilities, see my post Sigrity 2018—Into the 3rd Dimension.)
During design, sophisticated signal integrity rule checks can be run. These don't require the designer to be a signal integrity expert (although it never hurts!). The three checks that can be done here are:
The signal integrity engineer can run in-design reflection and crosstalk analysis using industry-standard IBIS models. (For more details on IBIS, see my post AMI and IBIS: Who Put the Eye in AMI?)
IR drop analysis can be done and displayed on the layout either as voltage, IR drop, or current density, as in the pictures.
Allegro PCB Symphony allows concurrent design with members of a team working on the same board at the same time. Now the signal integrity engineer can work at the same time doing in-design signal and power integrity analysis without needing to take a snapshot of the design as in the past.
Sigrity Aurora gives the capability to do in-design analysis at all stages of the design, from early schematic-based pre-design analysis, to electrical-rule-checking analysis during design, to full detailed post-route signoff analysis. It is also another example of Cadence's philosophy of having common engines at all stages of a design, not having separate engines used during the design phase from the signoff phase.
More details can be found on the Sigrity Aurora product page. Or, if you are at DesignCon, come by the Cadence booth #711 on Wednesday or Thursday and see it for yourself.
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