Breakfast Bytes Blogs

It's the Design Automation Conference and it is taking place in person in San Francisco. Last year's conference ended up being in-person in San Francisco last December, but it was a very muted affair with some companies not showing up at all, and others, like Cadence, present with a minimum of staff. This time it feels real.

EDA to Power Through Semiconductor Cycles

I suppose this should count as "day 0" since it was on Sunday evening. I still think of this as the "Gary Smith" slot, since for so many years he would give his state-of-EDA presentation, Unfortunately, he passed away in 2015. This year (and last December's DAC, too), the opening presentation to kick off the show has been given by Charles Shi, the analyst that covers EDA at Needham.

Charles' presentation was titled EDA to Power through Semiconductor Cycles. If I had to summarize his presentation in a couple of sentences, it would be that the semiconductor industry is entering a downcycle (boo!) but that EDA will barely notice and continue to grow as usual (hurrah!).

Charles talked for an hour so I'm not going to try and summarize everything. The two things that everyone wants to hear about from a semiconductor and EDA analyst are when the next semiconductor downturn will occur, and what will the effect of it be on EDA. See the above chart. Another thing that Charles pointed out with some newspaper (remember them?) headlines from twenty years ago is that nobody ever sees the downturn coming. They are complaining about the fabs being overfull and lack of available capacity right up until the moment that everything changes.

He pointed out that semiconductor has always been cyclical. It is not just driven by major downturns, such as the 2001 technology crash or the 2008 financial crisis. The semiconductor industry goes through its own cycles, often driven by over or under-investment in capacity. 

The graph above shows where some of those headlines occurred, in each case coming up to demand falling off a cliff.

Charles' view is that the rate of change of the overall semiconductor market indicates that we may well be entering a downturn. Since DAC last year (held in December, not July) the arrows have all been going in the wrong direction. But in the meantime, the industry is pouring record amounts of CAPEX (equipment and new fabs) into building up capacity. As Charles put it succinctly:

Capacity Is Strategy

In fact, I have seen capacity planning as akin to playing a game of chicken. You have to invest during the bad times since it takes two or three years for that investment to turn into wafer manufacturing capacity. Also, when things look good, it may not be the time to invest since there is an unanticipated downturn just around the corner. Remember, nobody ever sees them coming.

So after that depressing opening half of the presentation, Charles moved on to EDA. But EDA does not exist in isolation. On the left is the fabless ecosystem, with EDA, IP, and foundries supporting it. On the right is the foundry ecosystem, driven by fabless companies and supported by equipment and materials companies. AMD saw this slide and asked if they could borrow it for Mark's keynote the following day. So keep reading, and you'll see another version of this ecosystem slide.

Charles' final slides were about how semiconductor cyclicality affects the EDA and IP businesses. Actually, not much. See the above graphs.

And being in a Wall Street company, Charles had to wrap up with a slide with the stock prices of EDA versus semiconductor, Nasdaq, and the S&P 500. Hey, we're doing alright.

Advancing EDA Through the Power of AI and High-Performance Computing

DAC day 1 kicked off with a keynote from Mark Papermaster, CTO of AMD, titled Advancing EDA Through the Power of AI and High-Performance Computing. Again, since this was an hour long, I won't attempt to summarize everything he said, just hit up a few highlights.

Mark kicked off with what he sees as the challenges. He has an over-cute name for this: MetaMoorePhosis, continuing Moore's Law by things other than just scaling. 

AMD cannot do this in isolation. Here is Mark's version of Charles' slide from the evening before. At first sight, one conclusion is that AMD has better graphic designers than Needham...until you notice that there is a line missing from materials to foundry.

A big trend is the growing importance of Design Technology Co-Optimization (DTCO). This is deliberately adding functionality to the process, such as buried power rail, that makes it easier to design the components, especially SRAMs and standard cells. In fact, at 3nm, the increase in density from DTCO will be as big as the increase from scaling.

AMD has been a pioneer in interposer-based 3D ICs. Xilinx has been another, and, of course, AMD acquired Xilinx. For a number of well-recited reasons, systems-in-package built around chiplet partitioning opens up new design possibilities. But the EDA industry needs to deliver more optimized design flows for this style of design.

Overall power of electronics is becoming a big issue. Funnily enough, I wrote about this yesterday in my post about our acquisition of Future Facilities, and the problems building data centers in Luxemburg. The power that data centers use (or maybe it is all semiconductors) is on track to reach the total power available in the world. I think that is just electric power, not all power, but it is hard to run a data center on gas.

Mark wrapped up with some slides about how EDA and the semiconductor industry in general (and AMD in particular) need to work together and the importance of the design ecosystem in making this feasible.

Semiconductor Market Trends: Tying It All Together for the Big Picture

The Pavilion (in the exhibition center) opened with a "Financial Presentation". I assumed it would be Charles Shi doing a repeat performance as Gary Smith used to do. But no, it was Richard Wayrzyniak of Semico Research Corp giving a presentation titled Semiconductor Market Trends: Tying It All Together for the Big Picture. Again, he said a lot more than I'm going to talk about here. One big thing was that he was optimistic and thought that 2023 would not see a semiconductor downturn.

Semico's prediction is big growth in 2021 and a tiny downturn in 2022, which could turn positive if a few little things go right.

Here's a longer-term outlook. Will the semiconductor market make it to $1T by 2030 as many people have predicted? The big question is whether the next downturn happens soon (2023?) or whether it happens later out in 2028/9 when there is not enough time to recover and $1T will not be achievable.

But Richard thinks there is lots of strength in the EDA market. See his forecasts above.

But design costs are rising fast, especially for the software component of a big SoC.

Richard's final conclusions:

• Negatives include limited market visibility going forward, tightening economic conditions, and a general feeling of unease.
• Positives include relatively strong market demand, emerging new applications starting to get traction

To prevail, groups need to continually demonstrate value to the customer keep minds open to new possibilities, and to avoid risk when possible without being totally risk-averse. We can do things tomorrow we could not do yesterday.

Be smart and proactive, but "take not your counsel in your fears".  They don't pay the bills...you do.

ITF USA

I spent most of Monday afternoon at the USA version of the Imec Technology Forum. I'll cover that in a separate post sometime soon. But I did slip out for an hour in the middle of ITF USA to attend...

Cooley Troublemaker Panel

Joe Sawicki was billed to appear for Mentor/Siemens but unfortunately, he had a bike crash, broke a collarbone, and had a severe concussion. He was banned from flying and so he was unable to attend DAC in general and the Cooley troublemaker panel in particular. Ravi Subramanian (from Berkeley Design Automation acquired by Mentor in 2014) took his place.

But I'm not going to cover the event here. It will get its own blog post in the near future.

PSA

I am staying in a big upmarket hotel with a small coffee shop. Result: a line for breakfast, and it costs $50. So I always go to Mels Drive-In (despite the name, not a drive-in). It is faster, cheaper, and better than a hotel breakfast buffet. And it is literally two minutes from Moscone West. The address is 801 Mission Street. If you are a hipster, they even have excellent avocado toast.

Another bit of advice. The keynotes and some other stuff are on the third floor of Moscone West. That's two very long escalators. Just take the elevator. It's a lot faster. And if you are arriving from Mels Drive-In as advised, it is in the same part of the building.

 

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