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PSS is the Accellera Portable Stimulus Standard. Or I should say proposed standard, since it isn't finalized yet. At CDNLive India, Prabhat Gupta of AMD presented First Encounter with Emerging Portable Stimulus Methodology. Of course, since the standard isn't final yet, there are moving parts in all of this, but AMD decided to try it all out on a pilot project involving the Ryzen muliti-core, multi-thread CPU.
Since most people in the audience probably knew little about PSS, Prabhat gave an overview of PSS and of the Perspec System Verifier, Cadence's system-level verification tool that implements all (or most?) of the proposed PSS standard. This is not so much due to Cadence's engineering team doing a blazingly fast implementation, as that quite a bit of the standard is based on Perspec, which predates it (the other main EDA contributors are Mentor and Breker).
I won't repeat his introduction here. If you are not already up to speed on PSS and Perspec, then see my earlier posts on the topic:
AMD was using Perspec to run system-level tests on Ryzen, a multicore CPU. The high-level goals were to create infrastructure to run Perspec tests on:
What they hoped to find was:
A sort of cultural aim was also to bring the pre-silicon and post-silicon teams closer, since they would be using the same PSS infrastructure to give canonical representation of stimulus. Plus, of course, they hoped to improve time to market. There were four teams collaborating: the CPU diagnostic team, the CPU core IP team, the BIOS team, and the emulation methodology group.
The Perspec model of Ryzen was configured from a spreadsheet that configured the number of threads, the cacheline size, the sizes of the L1, L2, and L3 caches, cache associativity, and more.
A Perspec test loader was created that ran on the UEFI BIOS. This allowed one or more precompiled Perpec test binaries to be loaded and started on all available threads (see the diagram below).
Generate simple coherency tests, using a portable coherency action library from Perspec.
Perspec debugging APIs (printf, etc.).
Run actions concurrently on two threads of a given core, with each thread doing streaming store and cacheable loads. One thread's streaming store addresses are the same as the other thread's cacheable loads (so they potentially step on each other if there are bugs). Do this simultaneously on all cores, with some runtime variations. Then vary the parameters slightly so that Perspec generates hundreds of tests.
Prahbat showed a lot of the actual code, but that seems a bit too low level for a general interest post like this. The presentation should be available soon on the Cadence website (under CDNLive India).
Final conclusion: Portable stimulus methodology is great for creating complex system-level stimulus that would be really hard to create by hand. Automate. Automate. Automate.
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