Pegasus Flies into the GF Technology Summit

Today is the GF Technology Summit, what used to be called GTC in previous years. GF is, of course, GlobalFoundries. We also announced this morning that the Pegasus Verification System has been certified by GF on its 12LP, 12LP+, and 22FDX processes. More on that below. The summit in EMEA is tomorrow (September 16), and China and APAC the day after that (September 17).

The event would have been in the Santa Clara Marriott as usual, but of course, it is completely virtual. In GF's own words:

The GF Technology Summit offers an opportunity to discuss the challenges and opportunities in semiconductor design and manufacturing, learn about new technologies and solutions, and discover new ways to collaborate, partner, and invest so that together we can deliver more innovation, more capabilities, more intuitive interaction, more intelligence, and more feature-rich solutions.

The personal invite to the event on the GF website from Juan Cordovez, GF's Senior Vice President Sales and Clients Solutions, gives a bit more detail on the format:

I’m looking forward to welcoming you to our GF Technology Summit 2021 North America, which will be delivered in a new live interactive, virtual format. Join us to connect, build relationships and discover new ways of collaborating and innovating together. I look forward to spending time with you on September 15.

So it sounds like it will be a live event, not just playing a series of pre-recorded videos. I've obviously attended a lot of virtual events in the last year and a half, and I find it a lot harder to keep my attention focused on recordings, especially if the recording has been scripted and the presenter is simply reading the script. Live events are a lot more compelling, and live events where the videos are available for replay is perfect for me, since I can focus on the presentation when it is live, and then I can watch a replay if necessary to add to my notes when I write a blog post.

Agenda

In the morning, actually up until 1:45pm, there is a single track. In the afternoon, the event splits up into three parallel tracks (with, I have to admit, cute names):

• Going to the Next G (The latest wireless technologies including WiSat, WiFi and mobile user experience solutions)
• Electrons and Photons in the Datacenter (Purpose-specific low-power solutions for edge-to-cloud computing and connectivity)
• Cams, Homes, and Automobiles (Pervasive low-power, integrated technologies and solutions for the home, office, and the road)

The agenda for the morning and early afternoon is (Eastern Time):

• 11:00am - 11:10am: Welcome Juan Cordovez, Christine Dunbar, Mike Hogan, Michelle Leyden Li
• 11:10am - 11:35am: CEO Keynote Dr. Tom Caulfield & GF Executive Team
• 11:35am - 12:00pm: Special Guest Keynote Bob Bruggeworth, President & CEO, Qorvo & GF Executive Team
• 12:00pm - 12:30pm: Special Guest Keynote Murat Aksel, Member of the Board of Management, Volkswagen AG & GF Executive Team
• 12:30pm - 1:00pm: Building a Culture of Inclusion Emily Reilly & Mike Cadigan, GF Sharawn Connors Tipton, Micron Susan Schmitt Winchester, Applied Materials
• 1:15pm - 1:45pm: CTO Tech Wizards Roundtable Dr. Ted Letavic, Dr. Peter Gammel & Pirooz Parvarandeh, GF Linley Gwennap, Linley Group

There is a detailed agenda for the whole day available, including the three technical tracks.

There is also an expo, which is open from 9:00am until the event starts at 11:00am, and then from when the event finishes at 3:30pm until 5:00pm. Cadence will be there so come by and talk about our latest announcements, such as the new Tensilica Processor IP, Cerebrus, the Dynamic Duo, Pegasus, and anything else.

Pegasus Verification

Design tools, especially signoff tools, depend critically on data provided by foundries (or internally for an IDM). Of course, Cadence has a responsibility to make the software tools (or IP) give good quality of results (QoR), have high performance to handle large designs, and so forth. But the reality is that we cannot do it all on our own. It is the foundry (or the internal fab) that has to give the ultimate guarantee: if the tool working with the PDK the foundry provides says all is well, then the foundry can manufacture the design correctly, and it will work.

The most critical area of all is physical verification. This is partly because design rules are one of the biggest parts of the contract between manufacturing and design. Back in the 1980s, a design rule manual was a moderately sized book of rules that were directly comprehensible by the designer. Those days are long gone, and it is simply not possible to do manual design of a DRC-correct block. Today, even analog design is done largely on a fixed grid of poly and metal because the rules are so restrictive.

This morning Cadence announced that its Pegasus Verification System has been certified by GlobalFoundries on 12LP/LP+ and 22FDX. A process-name primer for you. 22FDX is GF's name for the 22nm version of the FD-SOI process that it licensed from ST Microelectronics at 28nm. There were plans to do a 12FDX and I expect we'll find out what the status of that is later today. The 12LP processes are optical shrinks of the 14nm process which GF licensed from Samsung. GF has no plans to go below 12nm, it abandoned the race to single-digit nanometers to focus more on specialty processes like FDX, silicon photonics, SiGe, RF, BCDlite, and so on. This decision was driven by the cost of developing a 7nm process and also the fact that the capacity of Fab 8 would not be "at scale" and so not cost-competitive.

GF-qualified rule decks are now available for customers who are designing products using these processes.

Pegasus was designed from the start to be scalable to massive numbers of CPUs. It consists of design-rule check (DRC), logic-versus-schematic (LVS), metal fill, and design for manufacturing (DFM). It also features tight integration with Innovus Implementation System (digital) and with the Virtuoso platform (analog, custom digital, mixed-signal). As a result of its cloud-ready architecture, it has near-linear scalability. Another powerful feature is that it does not require all nodes to be available before it starts the job, it can start off with a limited number of nodes and add more as the job proceeds and other nodes free up.

Let Your DRC Fly

Watch the video version, Let Your DRC Fly with the Pegasus Verification System (2 minutes):

Learn More

See my original post about Pegasus when we announced it: Pegasus Flies to the Clouds. Or TI's experience in my post TI's Experience Taping out with Pegasus.

For more details, see the Pegasus Verification System product page.

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