GTC 2020

Recently, GLOBALFOUNDRIES held this year's technology conference GTC. Of course, it was held virtually. You probably already know that a couple of years ago, GF decided to abandon the race to single-digit nanometer processes. In particular, they stopped EUV adoption in fab 8 (in Malta, NY).

Just a brief word about the process roadmap. GF does have a 14nm FinFET process that it licensed from Samsung, and I believe there is a second version of it with tighter pitches. But the flagship process roadmap is FD-SOI (full-depleted silicon-on-insulator). GF licenses the basic technology at 28nm from ST Microelectronics, who developed it. But they never brought that version of the process into volume production, and developed their own 22nm version of the process, called 22FDX. Subsequently, GF developed a 12nm version called 12FDX.

The transistors for the FDX processes are planar, not  FinFET, as in the diagram. They think that is different from the old planar transistors at 28nm and above is the presence of the BOX, the ultra-thin buried oxide. This is an insulator, and so it ensures that the gate can control the channel well, since the whole channel is very close to the gate.

Another feature is that the substrate (below the BOX) can also have a voltage applied, known as forward body bias (FBB) to increase performance, or reverse body bias (RBB) if it is being used to reduce power. The substrate cannot completely control the gate, the oxide is too thick, and it would be too slow anyway due to the inherent capacitance of the substrate. However, the voltage alters the transistor characteristics. This can either be done using fixed body bias, perhaps with different bias in different parts of the circuit. But it can also be changed dynamically as part of dynamic voltage and frequency scaling, or other approaches where the performance of the circuit needs to vary at different times.

For more details on FDX, bias, and more, see my blog post Cadence Tool Suite Qualified for 22FDX Reference Flow.

Opening Keynote

Tom Caulfield, the CEO, opened the conference with an update. Of course, with work-from-home, the digital infrastructure has become even more important, and so the semiconductor industry has become more important and we have only really started to fully exploit it in the last months.

Tom said that:

In 24 months, we pivoted and reestablished our relevance in the semiconductor industry. Take a smartphone. It has the application processor built on single-digit technology. But there is so much more: front end module., contactless NFC, embedded memory. We make those chips. The audio function? We make the chip. How about the touch screen? We make the chip. Battery life, we make the power management IC. The camera? We make the image sensor processor. This is where we focus, feature-rich differentiated solutions.

We also reorganized our go-to-market approach around segments. In the last 2 years, we have lots of sole-sourced differentiated solutions. Pivot from evolutionary to revolutionary adoption of digital technology and accelerate society’s digital adoption.

Tom identified 3 megatrends and one enormous hurdle. The 3 megatrends are:

The first megatrend is frictionless networking with low-power connectivity, security with embedded memory, fully-standardized networks.

The second trend is pervasive virtualization (the cloud) with high-speed backbone, ai-based data compression ad low-latency high-reliability 3D localization.

The third megatrend is hierarchical ai: ai-based data compression, novel compute architectures, frictionless network.

The hurdle is power consumption. In 2017, datacenters consume 3% of world electricity. But in 2040, computing will consume 100% of current energy production. This is an unsustainable path and as an industry we keen to change the path. For example, GF's 12LP+ process is 2X lower power than moving to 7nm.

As Tom put it when he wrapped up:

It has never been more important for industry to come together to flatten the energy consumption curve so we can enable these three major trends.

Lip-Bu Tan

Later in the morning there were a number of fireside chats where Tom interviewed various executives. One of them was Lip-Bu Tan, Cadence's CEO. Tom said like those old "most interesting man in the world" beer commercials, Lip-Bu is the most interesting executive in the semiconductor industry as CEO of Cadence and also Chairman of Walden International. Tom asked Lip-Bu to perspective through the lens of startups and VCs.

Lip-Bu says it is a data-centric revolution, all about the data, 5G, autonomous driving, datacenter. Over 90% of all data ever has been generated in the last 2 years, almost all if it unstructured, and only about 2% of it is ever analyzed. But at the heart, it is the semiconductor industry that drives it. "So that's good news for you and me, for GF and Cadence". It's not slowing down with domain-specific processors. We need to store the data in a very efficient way, and access it with the lowest latency. The last piece is how to analyze it. Lots of AI involved in labeling data so that we can make full use of it. It's exciting in terms of investment and in terms of design activity with Cadence and GF.

Tom asked how Cadence prioritizes IP. Lip-Bu said:

On Cadence IP we focus on star-IP: DDR, Tensilica, SerDes, etc. GF is really important for us especially in RF, silicon photonics, aerospace/defense. We value the partnership with GF. We have great collaboration.

The conversation moved on to Moore's Law slowing:

More than Moore is getting more important in terms of heterogeneous design. We have strong silicon packaging and system packaging from 2.5D to 3D packaging. Full complete solution and we work with GF to support our mutual customers. Magnetics, thermal, and system analysis (Clarity and Celsius). These show up to 10X better performance than incumbents. Two acquisitions this year of AWR and Integrand in RF and microwave design, ties in well with GF wireless and our mutual customers.

The final question was how Cadence is leveraging AI and machine learning.

It is very broad and transformative. We apply AI to our own tools to drive PPA. We have so much data and how do we drive improvement in our tools digital, custom, verification, and more. It's an important part of what we call “Intelligent system design”.

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