Announcing Helium, Hybrid and Virtual Platforms with Multiple Gears

This morning Cadence announced the release of the Helium Virtual and Hybrid Studio. This is a next-generation engine for hardware/software co-verification and debug. The full virtual model provides the highest performance for software development and validation, but Helium can also mix virtual models and RTL. It also has an almost magical capability: it can dynamically shift from virtual to RTL allowing you to get to the point of interest fast, and then dig into the gory details at the RTL level.

Debugging

If you have ever programmed, I'm sure that you discovered that you spent far more time debugging your code than writing it. In fact, Maurice Wilkes, who was the designer of EDSAC and the head of the Cambridge University Computer Laboratory while I was an undergraduate, pointed out in a famous 1949 quote how surprised he had been:

As soon as we started programming, we found to our surprise that it wasn't as easy to get programs right as we had thought it would be. Debugging had to be discovered. I can remember the exact instant when I realized that a large part of my life from then on was going to be spent in finding mistakes in my own programs.

As Diomidis Spinellis pointed out in his 2018 CACM Article, Modern Debugging: The Art of Finding a Needle in a Haystack, not much has changed.

Seven decades later, modern computers are approximately one million times faster and also have one million times more memory than Wilkes's Electronic Delay Storage Automatic Calculator, or EDSAC, an early stored-program computer using mercury delay lines. However, in terms of bugs and debugging not much has changed. As developers, we still regularly make mistakes in our programs and spend a large part of our development effort trying to fix them.

But the tools that we used have advanced dramatically, and Helium is another big step forward for SoC-based systems.

Virtual platforms have got more and more important as the software content of SoC-based systems has increased. No design group is going to tape out their chip without booting the operating system, and the software group will want to get the bulk of the software written and debugged before they see silicon. Back in the days where the software development was done on reference boards, I asked the manager of a software group in Japan what his engineers did while they were waiting for reference boards to arrive. "They pretend to program," he told me.

Some areas of EDA and software development I know a lot more about than others. I was the VP of marketing at both VaST Systems Design and Virtutech (now part of Intel) and we both had flavors of virtual platform technology. The big challenge faced by both companies was not models of processors like x86, Arm, PowerPC (used a lot in satellites), or the NEC V850 (used in automotive). It was getting the rest of the system modeled. We both had design languages to make that really easy, but it still took time, time which reduced the value proposition of reducing time to market. It was also a struggle to keep the models of other blocks up to date as the RTL changed. Just running the RTL on a Verilog simulator was far too slow to keep the software engineers happy.

Software-Driven Verification and Helium

Cadence has a much broader product line including Palladium Emulation and Protium Prototyping. This portfolio along with the Helium environment allows designs (software and hardware) to be run with pure software models, pure RTL models, or hybrid with parts of the system modeled in software and part in RTL. With Palladium and Protium, the problem of keeping the "high-level" model in-sync with the RTL has gone away, since the RTL model can just be run really fast. Using Xcelium is still not fast enough for software engineers but it makes it easy to do hardware verification using software to provide some of the stimulus.

Helium also provides an Eclipse-based unified software debug across this whole portfolio of engines.

IP Portfolio

Helium has an IP portfolio, for now focused on Arm-based designs. This consists of models of processors and peripheral blocks, but also complete reference platforms that can either be used as-is or customized. The IP portfolio also includes all the Tensilica cores. Of course, users can add their own models to platforms too.

Gearshift

Gearshift allows a virtual platform to be switched into RTL, and continue the debug session with the platform switched to be RTL running on Palladium or Protium. The picture above gives the basic idea. At the top everything is a virtual platform. At some point the virtual platform saves all its stage in Helium Smart Memory, and then all or part of the platform starts up again with emulation or prototyping,

The Bad Old Days

I opened with a quote about debugging from Maurice Wilkes. Here's another quote, this time from Apple's John Levy, on how it used to be to debug embedded systems:

Debugging is like laying a long railroad track. There's a little piece you want to test, so you back up the locomotive five miles down the road and at ninety miles an hour, you bring it across the track you're testing. If everything is perfect, it flies right over, but if there's one flaw, the engine rolls off, flying and crashing until it comes to rest a mile down the track. Only at that point do you get to see the pieces.

I've done my share of debugging like that, where all you get is a core dump of some sort. With Helium, debugging is nothing like that.

Learn More

See the Helium product page.

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