This week is HOT CHIPS. It has moved from the Flint Center at De Anza College, where it has been for years, and is now in the Stanford Memorial Auditorium, which I don't believe I've ever been in before. Last week was also HOT INTERCONNECTS, held at Intel. I thought that was a relatively new conference, but this year was the 26th year it has run (started in 1993). HOT CHIPS is in its 31st year (started in 1989). I won't be writing about HOT INTERCONNECTS since I was in Shanghai for CDNLive China while it was taking place. (If you want to read about how I got into town on the fastest train in the world, then see my post Maglev Trains.)

The format is the same as usual, with tutorials all day on Sunday, then presentations all day Monday and Tuesday. This year, Intel is sponsoring a reception on Monday evening by the conference hall, but also an event at a mystery location nearby (there are shuttles) called Hot Wings at Hot Chips—I suspect it is one of those things where people with limited sense (aka men) can show how macho they are by eating ridiculously hot chicken wings.

Join Intel’s Chief Architect Raja Koduri for an informal discussion about his vision for the future of computer architecture. This relaxed session will give you the chance to unwind with drinks, food, and experience hot wings with six increasingly spicy pillars of heat!

I won't run over the whole agenda, I'll just list a few of the presentations that I plan to attend, and many of which will appear in Breakfast Bytes in the rest of the month. 

Keynotes

There are two keynotes as always. I was at CES in January...and one keynote was by AMD's Lisa Su (see my post AMD Keynote at CES). Then I was at SEMICON West / ES Design West and one of the keynotes was by...Lisa Su. And on Monday the keynote, Delivering the Future of High-Performance Computing with System, Software, and Silicon Co-Optimization is by Lisa Su (I didn't write that one up, but there is a picture above). At CES, Lisa was largely focused on products. But HOT CHIPS is a much more technically focused—people don't want to know when the next Ryzen chip will be available, they want to know what's in it and how it was designed. Lisa:

will discuss new techniques in system architecture, silicon design, and software that will enable future generations of computing and graphics products to deliver more performance with greater efficiency.

The Tuesday keynote will be by Philip Wong, VP Corporate Research at TSMC, titled What Will the Next Node Offer Us? What will the industry do as we scale from 16/12nm, 10nm, 7nm, 5nm, 3nm, 2nm,1.4nm to sizes below a nanometer? Philip promises:

I will give an overview of the memory and logic device innovations that are in the research pipeline today. Future electronic systems require co-innovation of the computing architecture and device technology. I will speculate on how they will be integrated into future electronic systems.

Tutorials

Last year the focus of the tutorials was AI techniques. For example, see my post HOT CHIPS Tutorial: On-Device Inference. This year there are several tutorials on acceleration in the cloud, and probably AI in particular:

• The Nitro Project—Next-Generation AWS Infrastructure, from Anthony Liguori
• Acceleration at Microsoft, from Derek Chiou, Eric Chung, and Susan Carrie
• TPU V3 in Google Cloud: Architecture and Infrastructure, by Clifford Chao and Brennan Saeta

By the way, the Nitro chip was designed by Annapurna (acquired by AWS), whose CEO Hrvoye Bilic "Bili" gave a keynote at last year's CDNLive Israel (see my post CDNLive Israel 2018).

In the afternoon, the tutorials from 2:00pm to 5:00pm are all on RISC-V:

• Krste Asanovic of UC Berkeley will give an overview of the ISA
• Bunnaroath Sou of SiFive will give an overview of the software ecosystem
• Sagar Karandikar and Jerry Zhao of Berkeley will give an overview on the Rocket/BOOM open-source cores
• Fabian Schulki of ETH Zurich will give an overview of the Pulp open-source core

If you want to read my first post about RISC-V from the 2016 DAC where Krste presented, see my post RISC-V—Instruction Sets Want to Be Free. Other posts are also available.

Papers

One of the things that I like about HOT CHIPS is that a lot of internals of processors and SoCs are revealed, more than you tend to see anywhere else. For example, from last year, see my posts HOT CHIPS: Some HOT Deep Learning Processors and Samsung Galaxy S9's Application Processor.

The papers are a mixture of interesting architectures, but also deep dives into major (and often new) chips. Here are what look like the most significant from a commercial point of view:

• Before Lisa Su gives her keynote after lunch on Monday, AMD's Dan Bouvier and David Suggs present Zen2, which is the shortest title at this, or probably any other conference
• Then Andrea Pellegrini of Arm goes the other way with A Next-Gen Cloud-to-Edge Infrastructure SoC Using the Arm Neoverse N1 CPU and System Products
• Scott Willenbog and Jeff Stecheli of IBM go for the bland title award with IBM's Next-Generation Power Processor
• Coming up to lunch, Intel's Lily Looi and Jianping Xu present Intel Optane, which is Intel's name for their 3D Xpoint phase-change memory
• Facebook's Misha Smelyanskiy will present Zion: Facebook Next-Generation Large-Memory Unified Training Platform
• Intel's Andrew Yang (not the candidate for the Democratic nomination), Nitin Gagegrat, Connie Miao, and Karthik Vaidyanathan will present Deep Learning Training at Scale – Spring Crest Deep Learning Accelerator
• Jiansong Zhang from Alibaba will present Ouroboros: A WaveNet Inference Engine for TTS Applications on Embedded Devices.
• Debjit Das Sarma and Ganesh Venkataramanan from Tesla will present Compute and Redundancy Solution for Tesla’s Full Self-Driving Computer
• Rangharajan Venkatesan of NVIDIA goes for the geekiest title of the conference with A 0.11 pJ/Op, 0.32-128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Accelerator Designed with a High-Productivity VLSI Methodology
• Sagheer Ahmad and Sridhar Subramanian present the Xilinx Versal/AI Engine
• Intel's Ofri Wechsler will present their AI engine in Spring Hill—Intel’s Data Center Inference Chip
• John Burgess from NVIDIA will present RT ON: The NVIDIA Turing GPU Architecture
• AMD are back again with Michael Mantor on the 7nm "Navi" GPU
• And the last presentation of the day, to make sure we all stay to the end, is Elene Terry from Microsoft on The Silicon at the Heart of Hololens 2.0

Details

Full details of everything are on the HOT CHIPS website. You can still come. As it says on the website:

You may register online right up to the moment you walk in the door or you can register at the conference.

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