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Paul McLellan
Paul McLellan

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legato
CDNLive
CDNLive EMEA
reliability

Legato: Smooth Reliability for Automobiles

8 May 2018 • 4 minute read

 cdnlive logo breakfast byteslegatoIn his keynote at ICCAD in 2014, Bosch's VP engineering Peter van Staa said that EDA would "probably not" solve the problems of automotive, since they are totally focused on the leading-edge nodes. Well, that was four years ago, and EDA has got automotive religion since then. It's all about reliability and functional safety. Except that the automotive companies, and their major suppliers like Bosch, have discovered something too: you can't build chips for ADAS and autonomous driving without, yes, those leading-edge nodes. Indeed, two years ago (and two years after that keynote), Bosch opened an R&D center in Sophia Antipolis in the south of France focused on semiconductors for self-driving cars.

Digital chips (or the digital parts of mixed-signal chips) can get reliability with built-in-self-test, lockstep safety processors, and other techniques. But analog in automotive has a dirty secret—somewhere between 80-95% of failures are due to the analog parts of chips. Analog chips need to design for reliability at a more fundamental level than digital.

Although automotive gets a lot of the headlines these days, the same reliability challenges affect medical, industrial, aerospace, and defense applications. However, I'm going to say "cars" in this post, and if you are designing planes, or heart pacemakers, then make the mental substitution.

Legato Reliability Solution

Today at CDNLive EMEA, Cadence announced the Legato Reliability Solution, the industry's first complete analog IC design-for-reliability solution.

bathtub curveThe life-cycle of chips is represented as a bathtub curve, that shows the failure rate over the life of the chip:

  • at the start, there is a high failure rate due to infant mortality
  • during the lifetime of the chip there is a very low (ideally zero) failure rate
  • at the end of life of the chip there is wearout due to transistor aging effects, and perhaps metal migration

Corresponding to those three phases are three goals of the automotive manufacturer:

  • make sure that there are no test escapes that become field failures early in the design cycle
  • in the middle, drive the failure rate down as close to zero as possible, especially by preventing thermal overstress
  • extend wear-out as long as possible, at least 15 years for cars, and especially make sure that no failures happen earlier than forecast

 Analog Defect Analysis

Analog defect analysis has two main thrusts. One is to improve the efficiency of the tests by making designs easier to test and potentially reduce the number of tests (tester cost) required to achieve the target defect coverage. Second is to simulate the analog test, including defects, to estimate the test coverage of defective parts and ensure that a given defect would be "caught" by the test program.

In a little more detail, analog defect analysis first identifies what manufacturing defects are possible, and collapses redundant faults. Then it performs analog fault simulation. Finally, it calculates the test coverage. Using Virtuoso and Spectre Accelerated Parallel Simulator this can speed up the process by as much as 100X.

Electro-Thermal Analysis

thermal simulation

The next challenge is preventing thermal overstress. Automotive chips often have to operate under the hood at temperatures up to 155°C, making high-power dissipation more challenging. By dynamic simulation of temperature rise and simulation of temperature protection circuits, designers can avoid thermal failures during a product's useful life (in the bottom of the bath).

Going down a level again, this means extracting a thermal model for the die from the design data, and updating instance temperature during simulation based on self-heating, and heat transfer from adjacent devices.

Aging Analysis

Aging analysis has typically focused on wear-out due to "use" of the transistor. But aging acceleration happens due to temperature and process variation (especially for FinFETs which have a nasty self-insulating property due to their shape, compared to planar transistors). This holistic approach allows designers to achieve their design lifetime targets with less over-design.

aging analysisAdvanced aging analysis works by taking the circuit netlist and device model, adding a reliability model, but then adding a mission profile. Cars are not run 24 hours per day (heart pacemakers are at the other extreme, not stopping for many years once they are turned on). The mission profile contains the temperature, on/off time and burn-in parameters.

Spectre Native Reliability and RelXpert are used for self-heating analysis and to run Monte Carlo analysis. They produce device/age information, lifetime/degradation information, and aged simulation (how the device will perform at any point in its life, although towards the end is the most important).

Summary

This is the second Legato solution, following on Legato Memory Solution (see my post Legato: Smooth Memory Design).

  • Advanced methodologies and automation to reduce failures across the product lifecycle
  • Analog defect analysis to identify test escapes that cause early failures
  • Accelerated simulation technologies to reduce the time required for analog defect analysis
  • Design to prevent thermal overstress of power devices using electro-thermal analysis
  • Advanced aging analysis to analyze the impact of process variation on device degradation

Result: cars that run for years without any problems.

 

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