Breakfast Bytes Blogs

If this post seems like a bit of déja vu, that's because it is. The 6th Cadence Photonics Summit was scheduled for December. Unfortunately, that was the day that part of a major web hosting provider went down for half-a-day, and took our video platform down with it, and so we postponed the event to January. If you don't bother to read the rest of this post since you already read it before, the one thing that you need to know is that the new dates are January 19th-20th for US and Europe, or 20th-21st for Asia. If you were registered before, you are still registered for the new dates. If you were not registered before, you can still register. See links at the end of this post.

On both days, the event will be from 9:00am-12:00pm PST (California), which is 6:00pm-9:00pm in Europe (5:00pm-8:00pm in UK). The Asia version is a day later 9:00am to 12:00pm BJT (which is an hour later 10:00am-1:00pm JST and KST). If you are in India, all times are poor, but you can be an early bird or a night owl.

For the past two decades, integrated photonics has made tremendous progress and is now offered by industry-leading semiconductor companies. However, outside of its most common use in data communications, adoption is still slow and uneven, especially with applications where photonics should have a clear advantage such as sensors and lidar, and with many well-funded startups. What will it take for photonics to become a “standard” technology in the toolbox of system designers? 

The summit will look at what’s needed to foster the photonics ecosystem for sustainable adoption. Is it too hard to design? Too expensive? Not enough yield? What's missing? 

Detailed Agenda

These times are for the US/Europe edition. For Asia, add on 9 hours or so (depending on exactly where you are).

Day 1 (January 19th, 20th in Asia)

9am-9.40am:  Keynote: Transitioning from Electrical to Optical I/O by James Jaussi, Intel Labs

9.45am to 10.25am: Panel Discussion with moderator Robert Blum, Intel. Panelists, Gilles Lamant, Cadence; Lionel Kimerling, MIT; James Pond, Lumerical; Anuradha Murthy Agarwal, MIT; Richard Trihy, GlobalFoundries; Frank Tolic, NY CREATES

10.30am to 11am: Advances in Silicon Photonics Foundry Process Technology and Design Enablement by Samir Chaudhry, Tower Semiconductor

11.05am to 11.35am: Monolithic Silicon Photonics: A Foundry Perspective by Vikas Gupta, GlobalFoundries

11.40am to 12.10pm: Integrating Design and Test Solutions into an InP PIC Foundry by Ardy Winoto, Infinera

12.15pm to 12.45pm: Manufacturable Silicon Photonics PDK by David Ngo, CompoundTek; Federico Duque Gomez, Lumerical

12.50pm to 1.30pm: Beyond Datacom – Building a Broad Silicon Photonics Ecosystem at AIM Photonics by Nicholas Fahrenkopf, AIM Photonics

Day 2 (January 20th, 21st in Asia)

9am to 9.30am: Current Trends and Challenges in Vertical Optical Interconnects by Drew Weninger, MIT and Anuradha Murthy Agarwal, MIT

9.35am to 10.05am: Silicon Nitride Photonics with Optical Switches: From Concept to Integrated Product by Philippe Babin, AEPONYX

10.10am to 10.40am: A Novel Photonic Bump Technology for Seamless Photonics and Semiconductor Integration by Hesham Taha, Teramount

10.45am to 11.15am: Integration of Co-Packaging Technologies in Next Generation System Architectures by Christopher Blackburn, TE Connectivity

11.20am to 11.50am: Accelerate Photonic Integrated Circuits Physical Design Implementation Based on Process Design Kit Methodology by Ahmadreza Farsaei, Intel

11.55am to 12.15pm: Multiplanar Photonics for Artificial Intelligence by Jeff Chiles, NIST

12.30pm to 1pm: Seamless Photonic Component Design through Ansys Lumerical and Virtuoso Layout Suite Interoperability by Zeqin Lu, Lumerical

1.05pm to 1.50pm: Q&A moderated by Jeremiah Cessna, Cadence

Learn More

See the event page. You can register there. Or just click below. If you were registered before, you don't need to register again.

And there is a Cadence Photonics page.

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