Breakfast Bytes Blogs

Today is the Samsung SAFE forum. SAFE stands for Samsung Advanced Foundry Ecosystem. In the past, I've covered what was said, especially any details on the process and packaging roadmaps. But last year, Samsung decided to uninvite the press (having already invited them) so there was no press coverage at all. As of me writing this post, it still has not been decided whether press will be allowed this year.

Cadence is announcing some memory interface IP on several foundry processes, in particular GDDR6 and HBM2E for AI applications. As I'm sure you've noticed, AI is everywhere: in your phone, in your car, probably in your washing machine. And even if it's not in some device, some marketing guy is going to put an "AI-enabled" label on it. Do you remember about a decade ago when everything used "fuzzy logic"?

But AI is real, and for most applications have the attributes:

• Very high performance
• Low power, low heat
• Small physical size
• Not too expensive

You probably know that the G in GDDR6 stands for graphics. But that's so last year. GDDR6 is used for many applications outside graphics. The reasons are that it is higher performance than DDR5 and LPDDR5, and a lot cheaper and more reliable than HBM, which is often overkill.

The chart above shows the taxonomy of DDR. As a result of the high performance and low cost of GDDR6, it is finding a lot of use in:

• Artificial intelligence
• Neural networks
• Automotive
• Specific HPC accelerators
• Networking
• Level 4 cache
• Workstations, consoles, and laptops

HBM2E has very wide data but a modest data rate (since it gets its performance mostly from having lots of "pins"). The table above compares the two technologies and shows a typical subsystem for each in the diagram above.

GDDR6 systems are build in the usual way, with a packaged SoC connected on a circuit board to the DRAM packages. However, HBM2E has multiple DRAM die stacked with TSVs to give access to the lowest logic die (which, obviously, is not built in a DRAM process). Due to the number of connections, the SoC accesses this stack through an interposer, as in the diagram above. That shows four DRAM die stacked, but the JEDEC standard allows up to 12. This is expensive technology, and so it is used for more specialized applications that really need the capacity, low power, and bandwidth in a small physical form factor (for example, look at high-end NVIDIA GPUs). It is the Formula 1 racecar of the industry with a corresponding price-tag, and GDDR6 is only a Porsche—fast, with a lot more vehicles sold.

Cadence and Samsung

Cadence is the largest supplier of Samsung GDDR6 and HBM2/2E IP. GDDR6 IP is available in Samsung 5nm, 7nm, and 14nm. HBM2E IP is available in Samsung 8nm and 10nm.

Early access design kits are available for:

• DDR5/4 5600 Mbps - Samsung 5LPe
• GDDR6 16G - Samsung 5LPe

The table above shows the availability of all Cadence memory IP (not just GDDR6 and HBM2/2E, which are the last two rows).

The above images show the test chips for both GDDR6 and HBM2E, along with their eye diagrams. Test chip silicon reports are available.

These products are a complete solution, including:

• HVM production-ready GDDR6 and HBM2/2E IP, including PHY and controller
• Memory VIP (verification IP), the industry's most widely used digital VIP
• For pre-silicon validation, there are transaction-level (TLM) AT and LT models, along with Palladium (emulation) and Protium (prototyping) models
• For silicon validation, there is rapid bringup and debug software

Summary

You can build high-quality SoCs using Cadence's GDDR6 and HBM2 IP, silicon-proven on several Samsung processes, giving you access to Samsung foundry manufacturing (including, for HBM, silicon interposers). Cadence tools and VIP, along with Samsung technology expertise and high-volume manufacturing, provides a complete solution that gets you to market fast.

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