SEMI Strategic Materials Conference

Yesterday I wrote about EDPS, which takes place at SEMI. Today, I'm writing about SEMI's Strategic Materials Conference (SMC), which doesn't take place at SEMI but at the Doubletree. A few decades ago, semiconductor manufacturing only used a few elements: polysilicon gates over silicon oxide gate oxide, wiith some trace implants of boron and arsenic, and aluminum interconnect. Over time that has got a lot more complex. Gates got strained, then went to HiK metal gate. Interconnect went to TIW ("tie-tungsten") and then to copper, with vias and contacts lined with cobalt. Ruthenium looms, maybe. The transistors went to FinFET.

Each of these changes involved new materials. Who had ever heard of Hafnium until it turned out to be the material to replace silicon-dioxide as the gate oxide? But each of these changes requires support from the supply chain. You can't expect to suddenly place, out of the blue, high-volume manufacturing-sized orders of new materials. The purity levels required are insanely high for semiconductor manufacturing, too, which often means that regular chemical companies either can't deliver or are not interested, since often the quantities are pretty small compared to other industrial processes. Once a year, SEMI organizes SMC, which brings together the suppliers of these materials, with manufacturers of equipment and semiconductor manufacturers leavening the mix.

As an example, the diagram below shows all the equipment and material that is involved in what we, the design community, consider a single polygon, namely a 10/7nm via. There are only a few technologies, like oxidation, that are only used in the FEL for making the transistors. Pretty much every other manufacturing technology is called into play for this one step.

One of the things I like about talking to equipment and materials manufacturers is that they really know what is going on. Semiconductor manufacturers can put up roadmaps of fab ramps and so forth, but unless the equipment is being moved in and the consumables are being consumed, then this part of the ecosystem knows the truth more precisely. A couple of years ago at one of these events, everyone was talking about a delay at one of the Intel fabs, which I hadn't heard about. Sure enough, next earnings call Intel slipped one of their ramps to volume.

China

Lung Chu, who is president of SEMI China, gave a great summary of what is going on in China right now. This is a big enough, and important enough, topic that I will give it a post of its own. Chinese consumption and demand has driven semiconductor growth for much of the last decade. It has the largest share of the semiconductor market, a share that continues to grow. It is China's biggest import (bigger than oil), and there is a huge trade deficit in semiconductor (although some of that is just the way that the accounting is handed: when all those semiconductors go back out of China inside iPhones, they don't count as semiconductor exports). But just look at the chart below, which show where new facilities are being constructed. It is mostly internal too. Of the 24 fabs under construction in China, only five are investments from companies from outside China. Lung said that when regions/municipalities come to him for advice, he says, "Please don't build a fab—there are other ways to participate in the semiconductor industry".

AMD Keynote

Another presentation that I'll give its own post was Mark Papermaster's keynote The Future of Semiconductor—Moore's Law Plus. Mark is the CTO of AMD who is right on the leading edge competing head-on with Intel and NVIDIA in particular, in the CPU and GPU markets. One factoid I'll preview here is just how much impact 3D packaging technologies are starting to have. AMD reduced their die cost by 41% by using four dual-core die in a multi-chip module vs the (hypothetical) cost of building a huge monolithic-core die.

Arm: Post-Silicon Compute

Lucien Shifren of Arm Research gave a fascinating presentation about how Moore's Law and changes in silicon processes look to him. There is a lot of complexity in a modern process, and there is a lot more in the funnel if we are going to manage to keep semiconductor technology moving forward.

Historical Perspective from 1997

Dave Hemker of LAM Research gave a nice historical perspective with a few quotes from 1997:

• Materials limitations: "Copper is an intractable material. The reason we don't use copper is NOT because we haven't tried over the years."
• Device physics limitations: "...we get to 0.05um [50nm] in something like 2017...so that's the end of Moore's Law."
• Lithography limitations: "[for lithography] to go down to 0.1um [100nm]...there's hardly anything left at 193nm wavelength."

Of course, those problems were solved. We went from subtractive metal (put it everywhere and etch) to the dual damascene process we use today to make copper work, using electro-chemically plated copper and CMP. We invented strained silicon, HiK metal gate, FinFET devices. We invented immersion lithography, then multi-patterning, and (soon it seems) commercial EUV. 

He looked at those three things in particular, because the material suppliers (remember, this is a materials conference) played key roles in creating stuff that we just didn't have: copper plating, CMP consumables, ALD (atomic level deposition) HfOx precursors. For lithography, resists had to evolve to keep line-edge-roughness (LER) under control. To make this stuff work, a whole ecosystem needed, and will continue to need, to come together.

Oh, and those 1997 quotes. The author was Gordon Moore.

Other big changes with big materials implications was 3D NAND flash. It kept on "Moore's Law" defined by bit density, even though actually the pure dimensional scaling of the process is less aggressive for 3D flash than the prior generation of planar.

Dave is kept up at night, though, by DRAM. It is the biggest challenge right now for the industry since it has to go to multiple-patterning and there doesn't seem to be a "vertical" approach that is workable like there was for flash.

His big four technology inflections are:

• 3D NAND (well underway)
• Multiple patterning in DRAM
• Next-generation transistors and interconnect for foundry/logic
• Wafer-level packaging and TSVs for chip integration

John Pitzer of Credit Suisse

John's analysis is that we are moving from semiconductor being GDP- to being GDP+ (it will grow faster than GDP). It is the semiconductor renaissance. Recently, semiconductors have not been keeping up with the global economy. For the first 30 yearss, semiconductors outgrew the global economy. But since 2000 it has declined. Semiconductor revenue as a percentage of world GDP is no higher today than in 1994. Unit growth has been good, but we moved from a rising ASP enviornment into a declining ASP environment. Don't forget, Moore's Law is a cost law, not a price law. The price that you can sell a semiconductor for depends on the market and this is not a price elastic industry. For the equipment industry, it was worse still. 300mm enabled fully automatic fabs, so semiconductor revenue doubled but equipment was flat.

One thing he sees as driving pricing is that the old compute model was that we had PCs at home, which we used maybe 5% of the time. So there was very little interest in upgrading those PCs all the time to keep on the latest technology. Now compute is in datacenters and the cloud, which have very high utilization, and so financially they want to keep those servers and networks with as high a performance as they can, driving a much more aggressive upgrade cycle and, consequently, increases in pricing. Almost all the growth in the semiconductor industry in the last year or two has come from strengthening memory prices, driven largely by this phenomenon.

An optimistic data point for the equipment industry (and, to a lesser extent, all of in the semiconductor ecosystem) is that they calculate that if half of the disk-drive market is SSDs, and half of cars are level 4/5, then the additional semiconductor capacity required will need additional capex of $450B. That's 10 years of current spending, so a big increase.

Sign up for Sunday Brunch, the weekly Breakfast Bytes email.