Tensilica Has Its Own Track at CDNLive Silicon Valley

11 Mar 2016 • 2 minute read

Tensilica products are a bigger business than many people realize. The product line is #1 in DSP IP licensing revenue (since 2012) and is #2 in royalty-bearing licensable processors. 225 separate companies have licensed the technology, and they have created over 1,400 different cores that have been deployed in silicon. Currently around 2B cores per year are being shipped inside Cadence's customers' products.

Many licensees have not announced publicly that they are using Tensilica processors, but the above logos are some of the companies that have.

The underlying technology allows for fully customizable processors to be created. But just like some people want to get an off-the-rack suit, there are families of processors already configured for different applications:

Fusion, for Internet of Things (IoT) and other general-purpose applications, crypto, etc.
HiFi for audio, with hundreds of codecs available, and "always on" voice trigger
ConnX for communications applications such as LTE basestations and handsets
Vision for imaging, vision, and deep learning

The people who use Tensilca processors are not always the same people who use EDA tools a lot and so have not been the focus of CDNLive. But this year, there is a special track dedicated to just Tensilica products. CDNLive Silicon Valley will be held April 5-6th at the Santa Clara Convention Center. There will be presentations mostly by users of how Tensilica processors are being used to bring higher performance, lower power consumption, and lower cost to a variety of customer products.

If you attend, you will be able to learn:

How Tensilica Vision DSPs are making embedded computer vision a reality for mobile, automotive, drones, and other devices
How to implement FMCW radar on a real-time DSP for use in automotive applications
About embedding convolutional neural networks (CNN) in real products
How using audio tools can reduce your development time
How easily Tensilica processors can help you differentiate your products
About implementing cross-clock domain communication using FIFOs

You can also sign up for the R&D Luncheon, where you can have lunch with a member of our Tensilica R&D team and get answers to your toughest questions. Lunch sessions will be centered around two topics:

Optimizing processors for your application: 2X+ fewer cycles, virtually unlimited I/O
Scalable DSPs for audio, vision, communications, and more

And in the exhibit hall there will be demos of some of these uses of Tensilica IP.

Here is what is currently planned for the special Tensilica track:

Company	Name	Paper Title
Cadence	Himanshu Sanghavi	Imaging and Computer Vision: The Next Driver of SoC Growth
Uurmi	Dr Swanti Sarup	Real-Time Stereo-Based Range Detection on the Cadence VP5 Platform
Cadence	Steve Williams	HW/SW Co-Design to Accelerate Critical Algorithms Such as Hashed Linked List Traversal
Sensory	Dr Paul Mullowney	Implementing Face Recognition on IVP-EP DSP Platform
Irida Labs	Vassilis Tsagaris	DCT Transform: A SIMD-Based Approach
Uurmi	Dr Swanti Sarup	Defogging Visual Imagery
Cadence	Samer Hijazi	Is a Bigger CNN Better?!
RealTek	Ty Kingsmore	Integration of Voice Detection and Sensor Fusion in a Low-Power Chipset Using Tensilica Fusion DSP
Cadence	Tom Freschette	Cross-Clock Domain Communication Using Xtensa TIE Queue Interfaces and ChipWare FIFOs
Multicoreware	Anshu Arya	Convolutional Neural Networks on the Cadence Vision P5
Cadence	Pierre-Xavier Thomas	Implementation of FMCW Radar Signal Processing on Embedded Real-Time DSPs
DSP Concepts	Paul Beckman	Advanced Microphone Processing Algorithms on the HiFi DSP

You can register for CDNLive by clicking on the banner below.