Recently, Cadence acquired Integrand Software. I wrote a post about it, Designing Radios: Integrand, a few days later.

As I said there:

I was actually on the list of "need-to-know" employees on the acquisition, and so I went to the Integrand website to find out who they were. It hadn't been updated for years and the last press release was 2013. I assumed I was on the wrong website. But actually they are a small company, all engineers, with the founders originally from Bell Labs, and they have so much success from word-of-mouth that they haven't needed to do any marketing.

That sounded like it had to be an interesting story in itself, so I arranged to talk on the phone to Sharad Kapur to find out how it all took place.

Origins

I started by asking a little about his background. After all, you are unlikely to found an EDA startup straight after your bachelor's degree. And that goes double for the RF space, which seems to require a difficult mixture of deep mathematics, software development skills, and deep knowledge of how real-world designs are done. There is an old comment, I think about a bee flying, that it works in practice but not in theory. RF design seems to look a bit like that, too. A lot more than mathematical theory is required to get useful results.

Sharad told me:

I got my PhD in numerical analysis from Yale in 1996. I had worked on these techniques called fast multiple methods used for solving capacitance problems in IC analysis. I was recruited into Bell Labs for that work. While there I met David Long who is a computer scientist who was into formal verification. It had nothing to do with what I did. And I knew nothing about what he did. But we had offices close to each other so we started collaborating, and I taught him about numerics involved in fast solvers. He saw how this could be useful in the IC area and he started doing software implementation of the electromagnetic solvers. We had access to RF designers at Bell Labs who were our early users. David and I worked together for several years. It turned out to be an early algorithm that was valuable enough that Bell Labs sold it. We then worked on Nebula, a large-scale capacitance extractor, which also got sold by Bell Labs, this time to Cadence almost 20 years ago. That was our first inkling that what we were developing had commercial value. When Bell Labs fell apart, we got spun off into a division with no interest in EDA software, so we decided to leave and found Integrand. That was in 2003.

Sharad and David knew how to build the software, but were clueless about how to get any customers or find VCs. They regarded it as a "field of dreams" kind of thing, that if they built it, customers would come. They had a Bell Labs contact starting a foundry in Germany and it became their first customer and funded the original development. Unfortunately, or fortunately, depending on how you look at it, that foundry went out of business so all the IP reverted to Integrand. But without their lead customer. They had another Bell Labs contact who was a friend from kindergarten with the president of UMC, the Taiwanese foundry (pro tip: start networking in kindergarten!). In addition to manufacturing, UMC also supplied its customers with improved tools to improve their likely success (unsuccessful chips don't go into volume production). So UMC licensed Integrand's products for its own customers. This turned out to be critical since once foundries endorsed the software, selling to the downstream customers came relatively easily.

So that is how it all started in the first four or five years of the company. Since then, other than a few trade shows [above is IMS 2018], we have have done very little marketing and sales and relied largely on word of mouth and engineers talking to one another. The focus has been on technology development and customer support. By the time Cadence acquired us, we had something like 110 customers.

But that came with a couple of challenges. They had reached a stage where they couldn't really support the size of the business. They also needed a small team of specialists, but the top talents they required went to the internet giants, and not Integrand. They sold through distribution in Korea and Japan, but in the rest of the world, they were selling direct.

David was the technical mastermind and software architect. Meanwhile, Sharad told me that in addition to developing software, he was doing sales, support, legal, finance, and occasional janitorial duties. I've written before about how Mark Gogolowski had the most interesting job title in the semiconductor ecosystem: he was both CFO and CTO at Denali (see my post Party Like It's 1999—How the Denali Party Started). Sharad seems to have an even wider remit.

Technology

A big change in RFIC design that has happened over the last 20 years or so is the movement of passive components on-chip. Components, especially, but not only, ones involving inductance, that used to be surface-mount discrete devices on the PCB (or sometimes in the package), have moved onto the chip itself. This was driven by the performance becoming acceptable, and the reduction in cost and the increase in reliability.

A semiconductor chip is a stackup that is planar, with vias between the planes. For this, it is most efficient to use a method-of-moments integral solver to analyze it. This is both more efficient and more accurate than doing a fully general 3D analysis. One of the key numeric innovations, the Fast Multipole Method (FMM) was developed by Sharad’s advisor at Yale. This helped bring the analysis complexity down from cubic to linear time (in the number of unknowns). They then brought in what Sharad calls "a lot of computer-sciency stuff from David's background". The foundries helped fabricate and measure test chips and showed you could get within a couple of percent of measurement for a variety of different passive devices.

The above chart shows the linearity, analyzing various numbers of inductors compared to just a single one. Another "trick" is to exploit regularity once a component is meshed. For example, around the ring of the inductor mesh, the same combinations occur repeatedly, as shown in the image on the right.

Before Integrand's software, a typical design cycle for an RF chip was two to four iterations, including building test chips, each iteration taking three to four months. With EMX, design groups could remove one or two iterations and literally halve the design time. Obviously that had a lot of value.

But they changed the way people designed the chips, too. Previously groups would have to allocate a certain part of the chip to make on-chip measurements of the components, such as analyzing a transformer's performance. That stopped since EMX could predict the performance accurately. There was no longer any need to worry about testing individual components, just the chip as a whole.

This is another great example of the power of computational software. Before, people had to use up fab prototype runs and also valuable silicon to substitute for the lack of good computational software. Now, the software is so accurate that designers can go straight to silicon with full confidence. The algorithms scale, too, not limited to toy examples but used on many (most?) silicon-based radios and RF designs.

Foundries used to build a small library for RF, perhaps ten inductors, three transformers. That was all you could use. Now everything could be done in a more scalable way with parameterized models for components like inductors, where the layout is a function of the parameters. All leading foundries now use this as part of their PDK. Integrand built a specialized synthesis tool using Cadence's SKILL language and offered it to the foundries. The flow is shown in the diagram above. In addition, Integrand provided structures that complement the simpler devices that the foundries offered, such as a wide variety of transformers, inductors with shields, and more. EMX can handle relatively complex IC structures such as MoM capacitors in the metal stack, and thru-silicon-vias (TSVs).

I asked Sharad if he had anything to add:

In recent days working remotely has become a critical need in the economy. Working from home is enabled by communication chips. In general, Cadence tools are needed for designing these chips and EMX, in particular, is used for designing the radios on these chips. In a small way, we hope that this software can contribute to alleviating our present difficulties.

Learn More

This is the Cadence RF / Microwave page. We've updated it with the AWR products, but not yet Integrand's products. But I expect they will appear here soon. In the meantime, here is the product page on EMX on the Integrand website. 

An obvious question, since Cadence acquired AWR from National Instruments as well as Integrand, is what is the difference between EMX and AXIEM? Integrand's EMX is optimized for silicon-based designs. it is supported by PDKs from all the major (silicon) foundries. It has not been optimized for boards, antennas, getting S-parameters for electrically large structures, nor for III/V materials (such as GaAs and GaN). On the other hand, that is just what AWR's AXIEM is designed for. It is aimed at board-level designs and handles artifacts like planar antennas, large board simulations, distributed planar filters, III/V materials, and more. Both products are integrated with Virtuoso.

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