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Paul McLellan
Paul McLellan

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Celsius Thermal Solver
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Thermal Live, the Celsius Webinar

12 Oct 2021 • 3 minute read

 Recently, Cadence presented a webinar Celsius Thermal Solver for Electronic Design - Thermal LIVE. Melika Roshandell presented the product. She is the product marketing director for Celsius, following on 9 years as a thermal engineer at Qualcomm. Her presentation was followed by a demo of the product by Srdjan Djordjevic.

There are thermal issues in electronic systems at all levels:

  • Integrated circuits: Temperature rise can affect performance. It can also affect reliability due to electromigration and accelerated transistor aging. Often, temperature sensors are put on modern SoCs to control features like dynamic voltage and frequency scaling so that the operating system can decide to turn on a fan or other mitigation strategies. It is important to put the sensor in the sites that actually have the most challenging temperature issues, not somewhere that is always cool.
  • Boards and packages:  There can be challenges due to Joule heating in package and PCB. 3D-ICs are especially challenging since a chiplet (tile) on top of another chiplet acts as a thermal barrier. As on a chip, thermal issues can affect IR drop and performance.
  • System: At the system level, it is necessary to identify hot spots (such as certain chips) and, if necessary, evaluate thermal mitigation strategies such as heatsinks, fans, baffles, and heat pipes.

The need to do early thermal analysis means having the capability to do it in design. During signoff, the thermal analysis needs to be repeated before tapeout. There are also two different aspects to thermal analysis, and two different technologies used under the hood. The first is conduction, how heat flows through solids from chip to package to board, for example. The second is convection and radiation, how heat is affected by the flow of air (or other coolants as in liquid cooling). Conduction is analyzed using finite element methods (FEM) and fluids by computational fluid dynamics (CFD). Both of these work by breaking the design up into lots of tiny elements that are small enough that the temperature is basically constant across the whole element. There is a tradeoff between the number of elements and accuracy, and the number of elements translates into runtime. So the longer you are prepared to wait, the more accurate the analysis.

Celsius supports both FEM-based and CFD-based analysis. To learn more details about how this works, see my post Under the Hood of Clarity and Celsius Solvers.

Celsius integrates with all the appropriate tools from the Cadence portfolio:

  • Virtuoso (custom and analog design)
  • Innovus (digital design)
  • OrbitIO (3D packaging)
  • AWR (RF design)
  • Allegro (PCB and package)
  • Voltus (on-chip voltage analysis. See my post Celsius and Voltus: 2+2=5)

Celsius scales to huge designs, built on top of our core computational solver, a massively parallel matrix solver. It can take advantage of large numbers of processors in datacenters or in the cloud resulting in speedups of 10X or more. This allows it to produce accurate results with modest runtimes. As I said above, Celsius performs complete detailed analysis of complex system, including 3D-IC, die-to-die bonding and TSVs, and fully detailed PCB and packages (with no simplification required). It performs Joule-heating, stress, and warpage analysis, including transient electro-thermal co-simulation.

The Demo

I'm not going to attempt to write a detailed description of the whole demo. Srdjan used Celsius in 3 different ways, one doing a fast 2D (really 2.5D) analysis of an automotive motor control board using large currents of 5-100A. As you can see from the image, the design is quite complex. 

Unfortunately, the analysis shows that the current is too high and the board could potentially burn in the system. You can see the red areas where there is extreme thermal stress:

The second example was using Celsius to analyze a package leadframe and the associated wirebonds. Again, this is a demo so of course there are thermal issues, you can see the bright red wirebond in the thermal map below:

The final part of the demo uses CFD to analyze the design below, with a chip/package dissipating a lot of heat, and an enormous heatsink:

Learn More

If you have (or create) a profile on cadence.com then you can watch a replay of the webinar.

Or you can look at the Celsius Thermal Solver product page.

 

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