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Years ago, library characterization used to be fairly straightforward. The library had a few hundred cells, and it needed to be characterized at the SS, SF, FS, and FF corners. Those days are long gone. Libraries can have well over a thousand cells, including large complex multi-bit cells. But the big explosion is in the number of "corners" needed for characterization which can now run into the hundreds. Process variability means that it is not even obvious which corners are important and which can safely be ignored. Another complication is that supply voltages are getting close to the threshold voltage, so near threshold effects also need to be taken into account.
Cadence's latest library characterization product, Liberate Trio Characterization Suite, addresses all this.
Pop quiz: What tune is the recorder trio to the top left?
Last week, Cadence announced Liberate Trio Characterization Suite which addresses these issues. It is called Trio since it addresses the three issues of:
But the Trio name could also come from the fact that the Liberate Trio suite delivers up to 3X performance increase by running corners in parallel and natively running statistical and nominal characterization together.
Library characterization is perfect for running in the cloud, since each cell at each corner is a separate and largely independent simulation, so they can be run in parallel on literally thousands of cores. The jobs are not totally independent, at the very least some sort of job monitoring system is required to keep track of how the overall characterization is proceeding and give feedback to the team. To improve throughput further, machine learning is required for critical corner prediction: to process results of some corners and decide which other corners are required, and which can safely be ignored.
Liberate Trio can run on large on-premise datacenters, or can use Passport to run on a public cloud but managed by the library team, or on a Cloud-hosted Design Solution, where the infrastructure is all managed by Cadence. There is even express access, in which Cadence provides a portal and delivers everything in a turnkey manner. Maybe "library characterization as a service" or LCaaS. This can be very attractive, since outside of the IP suppliers and foundries, characterizing a whole library is something that is only done occasionally.
The machine learning leverages clustering techniques to identify and predict critical corners based on a handful of cells as opposed to the complete library. It then selects voltage corners for characterizaton. This reduces the number of cells that need to be characterized while still maintaining the accuracy of analysis.
I don't know for sure, but I would guess that Arm's physical library division is probably the world's biggest user of library characterization. It is for sure up there, anyway. Ron Moore is the VP of business planning for the physical design group. Coincidentally, he also worked for me last time I was at Cadence, doing planning for the so-called Superchip project, when Cadence started to pull its digital and analog solutions together to address the growing number of mixed-signal SoCs (a process that took many years in the end).
Ron says that they saw a notable improvement in turnaround time, even using the same number of CPUs. Of course, you can get even more improvement by using a higher number of CPUs, but it is important to note that the improvements do not all come from just ratcheting up the parallelization.
Any summary of a product called Trio has to have three bullets, right?
More information on the Liberate Trio Characterization Suite is available on the Liberate Trio webpage.
Pop quiz: It's Away in a Manger.
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