TSMC Technology Symposium: Four Strategic Markets

When Willie Sutton was asked by the judge why he kept robbing banks, he said "because that's where the money is." Actually he denied ever having said it (although if someone accused me of making such a great epigrammatic quote, I'd run with it). Anyway, until now TSMC has let their approach to the market be driven by mobile for the same reason: it was far and away the largest and fastest growing merchant market for semiconductors. That's where the money is. Other markets had to live with whatever mobile needed. However, mobile is slowing and other markets are becoming important but also have their own requirements beyond what mobile needs.

This doesn't just mean process, there is a stack of requirements with process at the bottom:

• Reference subsystems
• Microprocessors, GPUs, DSPs
• Standards-based IP
• Foundation IP
• Design flows and EDA capabilities
• PDKs
• Process

The requirements start at the bottom with the need for variants of the basic processes; in turn, they require different foundation libraries, sometimes different features in EDA tools, and different IP portfolios. Addressing a new market requires the entire stack of requirements to be met. The four market sectors that TSMC is targeting are:

• Mobile (it's not going away and will continue to be big)
• High-performance computing (HPC)
• Automotive
• Internet of things (IoT)

Here are the growth rates: mobile (smartphone) has 8% CAGR, emerging applications (automotive and IoT) are growing at 28% CAGR, HPC is growing at 10% CAGR. So you can see why TSMC is adding these additional markets to their already strong position in mobile.

As a key, here is the TSMC process family, ignoring the older processes:

• 55ULP and 40ULP are new ultra-low-power processes
• 28HPC is the main 28nm processes (28nm is in its 6th year of production)
• 28HPC+ is a new 28nm low-power process
• N20 planar (but importance is declining)
• 16FF+ is the current version of the first FinFET process
• 16FFC (C is for compact) is a new version of 16FF+ with the same design rules, fewer masks, an optical shrink, and a lower cost by 10-20% (which is huge)
• N10 is the next-generation FinFET process, which is also expected to be relatively short-lived since it will rapidly be superseded by...
• N7, which is actually two different processes, one high performance and one for mobile markets
• CoWoS is a high-performance 3D interposer-based packaging technology that can handle very large interposers (larger than the reticle size even)
• InFO is a 3D packaging technology that doesn't require an interposer

So here's how that portfolio of processes maps onto the four market segments:

• For mobile there is a new 28HPC+ process for the mid-range and low-end, and N10 and N7 for the high-end
• For HPC there is N10 and the HP version of N7. Also, there's a need for a new ecosystem and additional IP blocks. They are working on a test chip to demonstrate InFO packaging with high-bandwidth memory (HBM). The test chip includes two logic chips and two HBM memory chips, all on an InFO substrate.
• For automotive there is 16FFC for ADAS (and autonomous vehicles). Qualification for automotive is planned for Q3 2016. The foundation IPs are ISO 26262 compliant and AEC Q100 grade 1 (qualification later this year). 3rd party automotive IP will be qualified in 2017.
• For IoT there are both 28HPC+ and 16FFC, as well as 55ULP and 40ULP with eFlash and integrated RF. Hardware-based physically uncloneable security IP is under development.

The above diagram summarizes the big picture for SoC manufacture. 16nm today, 10nm tomorrow, and then two different 7nm processes, depending largely, I think, on whether the device is tethered or battery operated. Although 16FFC will be long-lived for mid-range mobile, high-end wearables, ADAS/infotainment and more. Not everything will end up at N7.