WEAA EDA/IP Product of the Year: Digital Full Flow with iSpatial Technology

Aspencore Media, the publishing house that owns EDN (where I first started blogging, as it happens) and the global EE Times publications, selected the Cadence Digital Full Flow with iSpatial as the EDA/IP Product of the Year in the 2020 World Electronics Achievement Awards program earlier this month.

EETimes describes the awards this way:

The World Electronics Achievement Awards (WEAA) honor companies and individuals who have made outstanding contributions to the innovation and the development of electronics industry worldwide. WEAA are praised by many and represent one’s leadership and excellent performance within the electronics industry.

Cadence Digital Full Flow

The image above shows the whole digital flow. The award is for the central part of this, which links Genus synthesis and Innovus implementation.

In the very old days, twenty years ago, synthesis tools just did synthesis, and place-and-route tools took the resulting netlist and placed and routed it. Synthesis didn't consider placement, timing was estimated using wire-load models. In my Ambit days, I used to liken this to estimating the time to travel between a set of cities in the US without knowing which cities they were. As Moore's Law advanced, it became hard to close timing with wire-load models and place and route sticking exactly to the netlist it was given. So synthesis took placement into account (it knew which the cities were). And place and route would rebuffer signals to close timing. This involved switching buffers in the netlist (and perhaps other gates) for larger ones with higher drive strength, and also adding additional buffers to long signal lines.

The first thing that needed to be done to tighten up the correlation between synthesis, physical design, and signoff, was to use common engines for everything. A single timing engine through the whole flow, common placement engine, common extraction, and so on. Of course, other complications came along too, like double-patterning, FinFETs, much higher metal resistance, and more. Like the red queen in Alice through the Looking Glass, "it takes all the running you can do, to keep in the same place."

iSpatial Technology

But even that is not enough anymore, so Cadence developed iSpatial technology. iSpatial takes this even further, bringing more awareness of the physical design into synthesis to improve the netlist due to better estimation, and adding more of the techniques used in synthesis (Genus) into place and route (Innovus). In the diagram above, iSpatial is shown as part of synthesis (which it is), but really it should be on the dotted line. iSpatial is a much tighter integration between synthesis and implementation.

If you know what it is, that means moving some of the restructuring into physical design, when a lot more is known. iSpatial allows Genus to use the GigaPlace and GigaOpt engines from Innovus, and allows Innovus to use the Genus mapper—the end result is improved predictability for RTL designers and better full flow PPA. iSpatial’s predictability and PPA advantages was featured by five leading semiconductor companies in our CadenceLIVE events this year.

If you break the flow down into some of the individual steps like mapping and clock-tree optimization, then you get a single synthesis and implementation flow, that looks like this:

If you want to make an even deeper dive, then see my post Under the Hood of Genus where I interviewed Chuck Alpert, who heads up the engineering for the Genus Synthesis product. Of course, there is plenty of secret sauce he didn't reveal, but that post is a good overview of how a modern synthesis tool works, and how it ties into physical design through iSpatial.

The Award

The award ceremony took place on November 5 in Shenzen (just over the border from Hong Kong if you don't know where Shenzhen is...your phone was probably built there). You can see the award itself earlier in this blog post.

Learn More

For more about the WEAA awards, see the award page. For more about this year's honorees, see the EETimes article on the awards and the ceremony.

For more about Cadence digital full flow with iSpatial, see the Digital Design and Signoff product page.

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