• Home
  • :
  • Community
  • :
  • Blogs
  • :
  • Breakfast Bytes
  • :
  • Announcing Xcelium Apps

Breakfast Bytes Blogs

  • Subscriptions

    Never miss a story from Breakfast Bytes. Subscribe for in-depth analysis and articles.

    Subscribe by email
  • More
  • Cancel
  • All Blog Categories
  • Breakfast Bytes
  • Cadence Academic Network
  • Cadence Support
  • Computational Fluid Dynamics
  • CFD(数値流体力学)
  • 中文技术专区
  • Custom IC Design
  • カスタムIC/ミックスシグナル
  • 定制IC芯片设计
  • Digital Implementation
  • Functional Verification
  • IC Packaging and SiP Design
  • In-Design Analysis
    • In-Design Analysis
    • Electromagnetic Analysis
    • Thermal Analysis
    • Signal and Power Integrity Analysis
    • RF/Microwave Design and Analysis
  • Life at Cadence
  • Mixed-Signal Design
  • PCB Design
  • PCB設計/ICパッケージ設計
  • PCB、IC封装:设计与仿真分析
  • PCB解析/ICパッケージ解析
  • RF Design
  • RF /マイクロ波設計
  • Signal and Power Integrity (PCB/IC Packaging)
  • Silicon Signoff
  • Solutions
  • Spotlight Taiwan
  • System Design and Verification
  • Tensilica and Design IP
  • The India Circuit
  • Whiteboard Wednesdays
  • Archive
    • Cadence on the Beat
    • Industry Insights
    • Logic Design
    • Low Power
    • The Design Chronicles
Paul McLellan
Paul McLellan
29 Jun 2022

Announcing Xcelium Apps

 breakfast bytes logoToday, we announced Xcelium Apps, a portfolio of domain-specific technologies implemented natively on the Xcelium Logic Simulator kernel that enable automotive, mobile, and hyperscale design teams to achieve the highest verification performance. By mixing and matching Xcelium Apps, customers can achieve up to a 10X regression throughput improvement.

xcelium apps

The Xcelium Apps today are:

  • Machine Learning: The Xcelium Machine Learning (ML) App utilizes proprietary ML technology to reduce regression times by learning from previous regression runs and guiding the Xcelium randomization kernel to either achieve the same coverage with significantly fewer simulation cycles or catch more bugs around specific coverage points of interest.
  • Mixed Signal: The Xcelium Digital Mixed-Signal (DMS) App enables native co-simulation with Cadence Spectre SPICE analog simulation, as well as advanced SystemVerilog Real Number Model-based simulation.
  • Multi-Core: The Xcelium Multi-Core (MC) App significantly reduces runtime for long-running high activity tests by multi-threading the Xcelium kernel, for example, on gate-level design for test (DFT) simulations.
  • Safety: The Xcelium Safety App enables serial and concurrent fault simulation, which, when combined with Cadence’s safety verification full flow that’s comprised of Jasper Safety, vManager Safety, and Midas Safety Planner, enables the highest performance safety campaign execution for ISO 26262 compliance.
  • Power Playback: The Xcelium PowerPlayback App enables the massively parallel Xcelium replay of waveforms captured by Palladium emulation onto a timing-annotated gate-level netlist for glitch-accurate power estimation of multi-billion gate SoC designs.
  • X-Pessimism Removal: The Xcelium X-Pessimism Removal (XPR) App shortens debug time by using advanced algorithms to make the propagation of “X” values in simulation more accurate.

I'm pretty sure it was Jasper that first came up with the idea of structuring a product as apps to simplify the introduction and use of the product. And when I say Jasper, I mean Jasper, the company before Cadence acquired them. And before Cadence acquired me. I was at Semiwiki at the time, but the post I wrote a decade ago is still online. As I said there:

Rather than deploying a general-purpose, all-in-one tool suite, many design teams need application-specific solutions that:

  • Address a wide variety of verification applications throughout the design flow, enabling them to adopt formal technology, application-by-application;
  • Enable teams to acquire the expertise necessary to address only the verification task(s) in hand;
  • Allow teams to license only the technology appropriate for a particular application; and
  • Eliminate or significantly mitigate the perceived risk in adopting unfamiliar technology.

Today, Jasper's formal technology is, of course, Cadence's formal technology...but it is still structured that way, known as Jasper RTL Apps.

Paul Cunningham, SVP of the System and Verification Group, put today's announcement more succinctly:

Xcelium Apps are the next step in the evolution of logic simulation performance. These apps deliver domain-specific technologies to enable the highest levels of verification performance at both the IP and full-chip-level of modern SoC designs.

xcelium logic simulation

Learn More

See the Xcelium product page.

UPDATE: Or watch the video...

 

Sign up for Sunday Brunch, the weekly Breakfast Bytes email.

. 

Tags:
  • xcelium |
  • simulation |
  • xcelium apps |