3rd Tensilica Day in Hanover: Extending our Senses

Two events in a row are a coincidence, three events are a series. With these words Professor Holger Blume has opened the 3^rd Tensilica Day at IMS Institute in Hannover and greeted more than 80 attendees, which made it the largest Tensilica-dedicated event in the world. Traditionally, the event is a mixture of academic and industrial presentations (find report from last year here),  with TU Dresden, Ruhr University Bochum and Leibniz University Hannover presenting different aspects of ASIP (Application Specific Instruction-Set Processor) ecosystem, like  application-aware operating system design (Hanover), self-adaptive multiprocessor SoCs (Dresden), which reconfigure themselves at the run-time (Bochum).

The industrial presentations were closer to the real-world applications like extension of our senses, be it visual sense with Computer Vision (Videantis) or proposals for new Hearing Aid devices (DreamChip). But the most exciting presentations are where industry and academia meet in the middle and do research together, academia can try out new ideas on platforms, which are provided by the industry. One great example of such a collaboration is THINGS2DO project, one of the outcomes was an ADAC chip designed by DreamChip, based on ARM and Tensilica processors, manufactured in GlobalFoundries 22nm FDSOI and provided to Hanover University for porting of algorithms for Computer Vision and CNN. Nicolai Behmann, a PhD student from IMS showed the CNN performance of VP6 compared to ARM NEON Extension, which is also part of the ADAS design. For the results I would recommend to review Nicolais' presentation, after reading it, one can immediately understand, why a dedicated CNN-accelerator is always a good idea, this is also the reason for neural processing unit in Kirin970 from Huawei and Apples A11 Bionic chip.

Cadence presented latest Tensilica cores and a demo of Protium hardware, with a VP6 processor mapped on it, running a CV-demo with pedestrian recognition. While also less advanced FPGA boards are capable to map Tensilica cores on them, the advantage of Protium is its extendibility with different bridges like PCIe, SATA, Ethernet, various audio and video interfaces and others. Also the same Verilog code can be verified on four Cadence verification platforms, formal verification with JasperGold, software-based simulation with Xcelium, emulation-based verification on a Palladium and FPGA-based verification on a Protium. Beside verification, Protium can be used by software-developers for developing software for a design, which hasn’t been manufactured yet, in order to speed up the bring-up time.

The ASIP community is certainly smaller than the ASIC or FPGA communities, heterogeneous hardware in a SoC is hard to manage, the optimization space is huge, therefore it is very important to have such events where the community can meet and exchange their experience. Next year the Tensilica Day will again welcome the community members to Hanover with new exciting demos and presentations.

Full agenda can be found here, the presentations will be released  here.