Analog IP Verification - A Reference Guide to Practices Used

I have had a lot of discussions recently around improving the final integration of analog IP. There has been a lot of material published over the years to aid in this task, and I wanted to point to some of my favorites while talking about what has and has not changed.

There is a lot to be learned from digital verification methodologies applied to "big A" mixed signal designs, and the first is leveraging a systematic approach to functional verification in order to continually converge on your specification. Applying this approach enables the design team to avoid connectivity issues and expand coverage of more complex analog/mixed-signal systems.The following papers provide a good guide to the growth of mixed signal verification and its future direction with some good examples.

Although the first paper is relatively old, the goal and details outlined by the author are very clear, making this a good foundation to build upon. Here our author, Jonathan David, takes us through a programmable approach to functional verification on a 10/100 Ethernet Phy. Best Practices and Methods for Mixed-Signal Verification

Designer’s Guide outlines a very good methodology for a similar concept with mixed signal verification in their paper, Designer’s Guide Consulting Introduction to Analog Verification. This paper starts to take into consideration the power of abstracting your analog blocks upwards for functional verification.

I cannot forget to mention my friends at Triune Systems and the webinar we put together late last year where they described how they used the top down design methodology approach to converge on design feasibility for power management: Are You Ready for Your Next-Generation Analog/Mixed-Signal Product?

What about the direction that mixed-signal verification and analog functional verification are going and what can be accomplished today? For presentations on Mixed-Signal Approaches in Assertion-Based Verification, and Verification Solutions for Digitally Calibrated Analog Design, see the ARM Tech Conference 2010 proceedings,  ARM Tech Conference 2010 Day 1, ATC-122 and ATC-124.

I will leave you with my most recent favorite: William Dunham's webinar with EETimes, Efficient Functional Verification for Mixed Signal IP. There are a lot of opportunities to improve analog verification and the tools are here today to help companies make significant impacts. I hope you all enjoy the material referenced as much as I have, and more importantly can take something away from it to improve your productivity and quality of your silicon.

John Pierce