Virtuoso Studio: In-Design Verification with iPegasus

Our new AI-powered custom design solution, Virtuoso Studio, leverages our 30 years of industry knowledge and leadership, providing innovative features, reimagined infrastructure for unrivaled productivity, and new levels of integration that stretch beyond classic design boundaries. In this blog series, learn how the best analog design tools just got better to help you keep pace with your challenging design issues.

Over the years, with the increasing complexity of design and physical verification, the need for in-design 'signoff quality' verification is felt more than ever. Designers frequently encounter problems during the design closure phase, including increased design rule check (DRC) iterations, wasted silicon area due to conservative design, and the unpredictable effects of inserted metal fill if physical verification is not carried out in the early stages. The adoption of advanced nodes has led to increased time in layout design. It has been noticed that teams spend more than 50% of their time running the verification for fixing layout issues.

Towards the end of design closure, designers often rely heavily on signoff tools due to the unavailability of in-design verification of signoff quality and metal fill flow. This can result in decreased productivity, increased time to market, and doubts about the accuracy of the design. To combat these issues, conducting in-design verification during the layout development phase is essential. The iPegasus In-Design Verification System for Virtuoso Studio allows layout designers to run signoff-quality DRC and metal fills during the early stages of the design.

The Differentiators

Along with the Pegasus integration, Virtuoso Studio provides in-design physical verification for:

• Design constraint overrides, net and net group overrides, and application overrides through the DRD checker
• Signoff-quality DRC checking through the Pegasus Physical Verification checker

In addition to supporting you with signoff-quality DRC, the iPegasus integration helps you stay in the Virtuoso Studio environment for physical verification without breaking your design workflow.

iPegasus DRC for Virtuoso Studio

The creation and verification of complex SoC, particularly at advanced nodes, can be a time-consuming process. iPegasus DRC for Virtuoso Studio improves productivity and delivers instant signoff quality DRC to achieve a higher quality layout to meet overall demand for faster design cycle turnaround time. iPegasus DRC, combined with foundry-certified rule decks, runs Cadence Pegasus Verification system in an instantaneous interactive real-time mode (iPegasus). It helps to boost productivity and layout quality with in-design signoff physical verification checks.

iPegasus DRC is an in-design DRC tool that can be invoked during layout creation or modification. It uses a signoff DRC rule deck and runs DRC directly on the layout without data translation. iPegasus DRC is an on-demand DRC that allows running of design rule checks with five different modes that range from the visible area to a whole cellview. In addition to the area-specific checks, it lets you check the edited portion of the layout through the “Changed Area” option. These modes give you the flexibility of invoking DRC at any stage of layout editing or DRC fixing. Further, you can continue layout editing while iPegasus DRC is running. It can operate on the “read-only” cellview, which is very useful when the layout is managed in a version-control environment. iPegasus DRC excludes the run-time overhead introduced by data translation and rules compilation. So, for small blocks or device-level designs, Pegasus DRC is more attractive than its signoff counterpart.

Key features for iPegasus DRC for Virtuoso Studio include:

• Higher performance
• Capability to run DRC on the complete layout as well as specified areas
• Run-time improvement leveraging snapshots for design rule capturing
• One-click access to run the DRC

 iPegasus DRC supports a mode (area limited) where a full Virtuoso In-Design DRC license is not required. Learn more about iPegasus DRC for Virtuoso Studio.

iPegasus Fill for Virtuoso Studio

iPegasus Fill for Virtuoso Studio is getting more attention with the adoption of advanced nodes because, at advanced nodes, metal fill can contribute to significant differences in parasitics, making it important to capture the impact of metal fill during the implementation stages for a better and faster convergence in the final design. In-design fill generates signoff quality metal fills and maps them to the OpenAccess design.

The signoff-fill is an interactive tiling feature seamlessly integrated with the OpenAccess database without any dependency on stream in/out. It is very useful for tiling symmetrical analog blocks implemented in a half-cell approach.

Benefits of the iPegasus Verification System for Virtuoso Studio

iPegasus DRC and Fill offer many benefits for layout engineers, including the following:

• Provides access to signoff-quality DRC and metal Fill checks based on signoff foundry rules
• Helps achieve tight integration between Pegasus Verification and Virtuoso Studio with a minimal learning curve
• Layout engineers can enable iPegasus by default in Virtuoso Studio with in-design use-models for settings, viewing results, and debugging the environment
• Provides a use model for signoff-quality DRC checks at any stage of the layout development cycle
• Finally, it avoids any surprises at the final signoff physical verification checks

iPegasus, with its features and easy usability, helps to increase efficiency and speed up the layout design. It provides the capability to run signoff-quality in-design DRC checks. The iPegasus in-design verification for Virtuoso Studio and Pegasus integration deliver signoff quality with foundry-certified rule decks for 100% accuracy and help in major productivity boost (up to 50%). The unified GUI helps to perform layer-specific and window-based checks.

Related Resources

• Virtuoso Studio
• iPegasus DRC
• An Overview of iPegasus Signoff DRC/Fill (login required)
• An Overview of iPegasus SignOff DRC/Fill (Video) (login required)
• What Is iPegasus Signoff Fill? (login required)

For more details of the various features described here, refer to the product documentation at support.cadence.com or contact Cadence support.

Subscribe to receive email notifications about our latest Custom IC Design blog posts.

Contact Us

For any questions or general feedback, please write to custom_ic_blogs@cadence.com.

By Olivier Arnaud, Product Engineering Group Director, Cadence