Virtuoso Video Diary: What is Virtuoso System Design Platform?

“Any sufficiently advanced technology is indistinguishable from magic.”
― Arthur C. Clarke, Profiles of the Future: An Inquiry Into the Limits of the Possible

Virtuoso System Design Platform functionality is no less than a magic for an IC designer for whom the weeks of effort gets reduced to just few minutes! Virtuoso System Design Platform brings together the Virtuoso® and Allegro®/Sigrity™ platforms seamlessly. The functionality aids in an important function of the semiconductor industry to manufacture chips that work in real environment with the package and PCB system in place.

Virtuoso System Design Platform provides an IC-centric solution with top-down (designing a specification-level package) and bottom-up (simulating an existing PCB/package system) capability. This is the ideal solution as it helps bring in a complete simulation environment and at the same time requires minimal knowledge about PCB or package and electromagnetic simulation domains. You can expect a colossal improvement in productivity with such an integrated solution!

As an IC designer, you can leverage Virtuoso System Design Platform in the following ways:

• Update the IC layout and package layout design using Virtuoso Schematic Editor. Therefore, in addition to the IC layout, you can now design the schematic for a package layout using Virtuoso Schematic Editor. It provides a single schematic editor driven IC and package design.
• Create a package or PCB parasitic-aware schematic that can be simulated with Analog Design Environment (ADE) including multi-technology simulations. This is an essential mechanism to realize complete system-aware simulations.
• Design IC and package layout through the co-design die abstract flow simultaneously. This minimizes design iterations and cuts down a very late stage floor-planning and design feasibility issues.

There are mainly two flows in Virtuoso System Design Platform:

• Implementation - you can export a die symbol from Virtuoso layout and create a package schematic in Virtuoso Schematic Editor and then, transfer the schematic data to System in Package (SiP) layout to build a physical layout.
• Analysis - you can create a simulation schematic from the PCB/Package, build the testbench, perform the LVS check, and simulate the IC in context of PCB/Package using the ADE-Spectre simulation interface.

VIrtuoso System Design Platform Implementation and Analysis Flows

The following videos available on Cadence Online Support depict the entire flow (implementation or analysis) as a solution for the customer requirements, such as designing package and ICs together in a single schematic editor to analyze and simulate whole system or managing the parasitics and connectivity in the design.

• Implementation Flow 
• Analysis Flow 

Click the video links now or visit Cadence Online Support and search for these videos under Video Library.

Note: If you don’t have a Cadence Online Support account, you can play the above videos (mp4) natively in Cadence Help when you are using Virtuoso IC6.1.7/ ICADV12.3 (ISR9 or later). In the Cadence Help Virtuoso Documentation Library, look for video titles under Video Demos.

Related Resources

• Virtuoso System Design Platform User Guide
• Virtuoso System Design Platform Tutorial

 Note: For more information on Cadence products and services, visit www.cadence.com.

About Virtuoso Video Diary

Virtuoso Video Diary is an online journal that relays information about Virtuoso videos that are available in the Cadence Online Support Video Library. Hundreds of interesting videos on a wide variety of new and exciting Virtuoso features have already been created. Virtuoso Video Diary brings you direct links to these videos and other related material, on regular basis. Click Subscribe to visit the Subscription box at the top of the page in which you can submit your e-mail address to receive notifications about our latest Video Diary posts.

Deepti Mishra Gupta