Cadence at DesignCon 2026: AI-Driven Design from Booth to Best Paper

When the industry's toughest engineering questions meet their sharpest minds, you know you are at DesignCon!

From February 24–26 at DesignCon in Santa Clara, the conversation centered on a clear reality: AI is redefining the limits of bandwidth, power delivery, thermal management, and system complexity. Engineers, researchers, and technology leaders gathered to discuss trends and confront the practical challenges shaping next-generation electronic design.

Cadence stood out with a comprehensive presence across panel discussions, sponsored sessions, technical paper presentations, interactive booth demonstrations, and a networking event. From advancing agentic AI in electronic design to introducing forward-thinking methodologies in power integrity and system-level analysis, Cadence showcased solutions grounded in technical rigor and engineered for real-world impact.

Panel Discussions: Where Vision Met Reality

DesignCon's panel discussions are where bold ideas are stress-tested, and this year, Cadence was right at the heart of two of the event's most talked-about discussions.

Agentic AI for Electronic Design

Moderated by Charles Alpert, AI Fellow at Cadence, alongside Chris Cheng of HPE, this panel emerged as one of the most forward-looking conversations at DesignCon. Industry leaders examined how AI agents are moving beyond automation toward reasoning-driven engineering workflows.

From domain knowledge ingestion to Python application programming interface (API) code generation and autonomous task execution, the discussion balanced enthusiasm with pragmatism. Panelists offered a candid assessment of adoption barriers, integration complexities, and the distinctions between agentic workflows and conventional design methodologies. The discussion highlighted a shared view: agentic AI is not positioned to replace engineers, but to serve as a productivity multiplier—one that requires deliberate strategy, governance, and thoughtful implementation to realize its full potential.

Powering the Future: AI in Power Integrity

If the first panel looked toward transformation, the Power Integrity discussion grounded the conversation in engineering realities. Industry experts, along with Yun Chase, Solutions Architect and Product Engineer from Cadence, tackled the complexities of modern power integrity (PI) design—from multi-layer PCB stackups to 32+ phase vertical power delivery.

Rather than offering generic AI optimism, the panel focused on practical use cases such as decap optimization, voltage regulator module (VRM) placement, and feasibility analysis. Data scarcity, layout-driven constraints, and long simulation cycles were also discussed. The result was a refreshingly candid conversation about how AI can augment power integrity workflows.

Sponsored Sessions: Tackling Real-World Complexity

Cadence-sponsored sessions drew packed audiences eager to explore how simulation, AI, and advanced design methodologies are reshaping the industry.

Simulation-to-Measurement Correlation in the AI Era

Alfred (Al) Neves, Founder and CTO of Wild River Technology, delivered a compelling presentation on achieving strong simulation-to-measurement correlation in AI-driven signal integrity environments. With nearly four decades of experience, Alfred shared practical techniques spanning both time- and frequency-domain analysis. His emphasis on measurement-based modeling up to 110GHz resonated strongly with engineers navigating the realities of ultra-high-speed design validation.

for the full presentation.

System-Level Packaging for Next-Gen Silicon

Mark Gerber, Product Management Group Director, IC Packaging, and Brad Griffin, Product Management Group Director, System Design & Analysis Group, at Cadence, addressed one of the most pressing challenges in modern electronics: the complexity of advanced IC packaging. Their session demonstrated how Allegro X Advanced Package Designer (APD) and AI-driven routing solutions streamline system-level design, reduce layout cycle times, and enable efficient 2.5D/3D integration. As packaging evolves toward heterogeneous integration and co-packaged optics, their insights highlighted the importance of integrated analysis within the design flow.

for the full presentation.

JESD204C Compliance in Practice

Garrett Warren of Mercury Systems delivered a detailed case study on achieving JESD204C physical-layer compliance using Cadence Sigrity X System SI technology. By walking attendees through channel modeling, jitter injection, COM evaluation, and automated compliance checks, he demonstrated how simulation-driven workflows enable predictable signoff, even at 32 Gbps lane rates.

for the full presentation.

LPDDR6 for AI Data Centers

Frank Ferro, Group Marketing Director at Cadence, provided a forward-looking look at LPDDR6 and its role in powering AI infrastructure. Building on LPDDR5X advancements, LPDDR6 introduces higher bandwidth, improved power efficiency, and critical reliability, availability, and serviceability (RAS) features tailored for data center reliability. As large language model (LLM) training workloads intensify, his session emphasized the importance of memory innovation in sustaining system performance and enabling next-generation AI infrastructure.

for the full presentation.

Optimizing AI Interconnects to 448Gb/s

RaulStavoli, Senior Principal Signal and Power Integrity (SI/PI) Engineer at Rosenberger North America, presented scalable simulation workflows for optimizing AI interconnects approaching 448Gb/s. By integrating 3D EM modeling>, machine-learning-based solvers, and reusable "simulation tooling," his session demonstrated how engineering teams can efficiently explore complex solution spaces while ensuring manufacturability.

for the full presentation.

Technical Paper Presentations: Innovation on Display

DesignCon's technical paper presentations are where deep research meets industry application, and Cadence contributions stood out.

AI-Driven Thermal-Aware Data Center Capacity Planning

Yixing Li, Senior Principal Software Engineer at Cadence, presented a breakthrough framework for thermal-aware capacity planning in AI-driven data centers. Li's AI-driven framework predicts temperature distributions in milliseconds—achieving up to 10,000X speedup compared to high-fidelity computational fluid dynamics (CFD) simulations.

Best Paper Finalist: Bridging the Time-Frequency Chasm in PDN Design

One of the highlights of Cadence's presence at DesignCon 2026 was the recognition of the paper "Bridging the Time-Frequency Chasm in PDN Design: Leveraging Cumulative Power-rail Noise and Reverse Pulse Techniques for Spatial-Frequency Insight" as a Best Paper Finalist.

Presented by John Phillips and Kristoffer Skytte from Cadence alongside their industry collaborators Istvan Novak, Ethan Koether (Amazon), and Shirin Farrahi (Marvell), the presentation introduced a novel methodology combining Cumulative Power-rail Noise (CPN) and the Reverse Pulse Technique (RPT).

Booth Demonstrations: Engineering in Action

Beyond sessions and panel discussions, the Cadence booth served as a hands-on innovation hub.

Live demonstrations illustrated how simulation and analysis technologies connect across chips, packages, and boards, bringing system-level design intelligence to increasingly complex architectures.

Cadence Networking Event: No Illusions. Just Experts

Building on the momentum from the technical sessions, the Cadence networking event, themed "No Illusions. Just Experts," allowed industry peers to engage in technical conversations over food and drinks, featured curated giveaways, and even included a magician to draw attendees to the booth—creatively reinforcing that while the entertainment was magical, the engineering expertise was grounded in real-world results.

A Cohesive Message: AI + Physics + Real-World Engineering

Across every forum, booth, sponsored session, panel, and paper presentation, a consistent theme emerged: AI is most powerful when grounded in physics and real-world engineering constraints.

Whether it was simulation-to-measurement correlation at 110GHz, agentic design flows, AI-enabled thermal planning, or advanced PDN methodologies, Cadence demonstrated a holistic approach. Rather than presenting isolated tools, the message centered on scalable workflows, cross-domain integration, and practical enablement for engineering teams to build next-generation systems.

DesignCon 2026: From Insight to Impact

DesignCon 2026 reinforced the accelerating convergence of AI, signal integrity, power integrity, thermal analysis, and system-level design. Cadence's contributions, from moderating transformative panel discussions to earning the Best Paper Finalist recognition, reaffirm its position as a leader in this evolving domain.

As bandwidth pushes toward 448Gb/s and AI workloads reshape infrastructure demands, one thing is clear: the future of electronic design will be defined not just by speed, but by intelligent, integrated workflows that combine simulation, AI, and deep domain expertise.

And at DesignCon 2026, Cadence stood firmly at the center of that future!

Ready to move beyond AI as a concept and into measurable impact? Learn how Cadence AI solutions are transforming design workflows from silicon to system.