MediaTek Is Leveraging AI Optimization for Signal Integrity Design

In the 5G and 6G communications era, signal integrity design considerations have become increasingly crucial in high-speed interface design. Interconnects in the PCB and the package carry high-speed signals around the board and must be designed to eliminate common signal integrity problems. MediaTek’s design process usually relies heavily on human intuition, but with the help of a few Cadence.AI generative AI applications from Cadence, they’ve increased design productivity by 75X.

Interconnect design considerations involve impedance control routing, proper stackup design, length matching tolerance, and the termination network design for impedance. It takes experienced engineers to identify the correct parameters based on the results of each simulation, as well as a lot of back and forth between the analysis and layout teams.

In its channel design flow, MediaTek is leveraging Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver for their high-speed interface designs. The Optimality Explorer is a generative AI-driven multiphysics software solution that provides analysis and optimization realization of electronic systems.

The signal integrity/power integrity analysis team at MediaTek helps layout designers achieve better performance so that they can meet customer demands quickly. The AI technology in Optimality Explorer benefited MediaTek’s engineers by providing valuable insights and answers, enabling them to spend more time thinking about the reason behind the optimization process rather than simply repeating it.

Danny-DY Ho, senior department manager at MediaTek, stated, “With its multi-target approach, a high degree of freedom for tuning based on the initial layout, and other advantages, Optimality Explorer supports our team in saving time and building flexibility for design.” Learn more about how MediaTek is optimizing signal integrity design.

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