New Ultra-Fast Debug Solution for Palladium Emulation with Verisium Debug

Verification engineers continually report that up to 70% of the total engineering time spent on verification is consumed by debug, particularly when relying on disparate tools across multiple vendors. To help address this debugging challenge, Cadence introduces Verisium Debug, the first and only debugging solution comprehensively integrated with all Palladium platforms. Early adopters are already benefiting from advanced capabilities such as 2X faster waveform generation, 5X smaller database sizes, and faster waveform import performance, powered by FullVision 3.0 technology.

Streamlining Emulation Workflows with Palladium Platform and Verisium Debug

The Palladium platform offers high-performance emulation to enable fast and efficient hardware verification. It facilitates early HW/SW co-verification, system validation, and power analysis with unparalleled speed and scalability. The platform supports a wide range of applications, ensuring flexibility and productivity for designers aiming for rapid development cycles and comprehensive system validation.

Verisium Debug is an advanced AI-powered debugging solution designed to streamline and enhance the debugging process across various Cadence verification engines. It features a seamless, unified GUI, AI-driven root cause analysis, expedited waveform bring-up, and a rich Python API for custom applications. This solution addresses diverse debugging needs across testbench, RTL, gate-level, emulation, and more.

The Palladium platform now integrates with Verisium Debug, powered by FullVision 3.0 technology, to transform debugging workflows with faster waveform generation, smaller database sizes, and improved efficiency. The IXCOM unified compilation for Palladium Emulation and Verisium Debug streamlines the user experience by providing a consistent design hierarchy across both emulation and debug, eliminating discrepancies, simplifying the workflow, and requiring no additional compilation script to prepare the debug database. Together, Palladium platform and Verisium Debug set a new standard for performance, usability, and efficiency in emulation debugging.

Key Benefits

Key benefits of Verisium Debug for Palladium emulation include:

• FullVision 3.0 offers twice the waveform generation capability, reduces the waveform database by five times, and offers faster waveform import performance.
• IXCOM-Sage compilation flow simplifies the processes for emulation and debug database compilation.
• The updated Sage database maintains consistency between emulation and debug operations and is scalable for handling large designs.

Dr. Ziyad Hanna, corporate vice president of research and development, System Verification Group at Cadence, highlights the benefits of this new integration: "The increasing complexity of SoCs elevates the requirements for effective debugging. Debug turnaround time is critical in the IC verification flow. The recent integration enables Verisium Debug users to double their waveform generation speed, decrease database size by five times, and speed up waveform importing performance. These improvements greatly enhance debugging efficiency for Palladium users, while the comprehensive integration ensures a smooth and effortless debugging experience."

Phison, a leading NAND storage solution provider, has substantially benefited from Palladium Emulation by incorporating Verisium Debug into its processes. According to Vincent Cheng, VP of R&D at Phison, "Integrating Verisium Debug with the Palladium platform has transformed our emulation debugging process, delivering unprecedented efficiency and streamlining our workflows."

Learn more about Verisium Debug.