Reinventing Embedded Memory: How RAAAM Is Solving the SRAM Scaling Wall

As AI, automotive, and data centers continue to scale exponentially, one part of the chip has quietly become a bottleneck: embedded memory. Modern designs now dedicate more than half of their silicon area to SRAM, yet SRAM no longer scales with Moore's law in advanced CMOS nodes. The result? Larger chips, higher power, and rising costs.

RAAAM is a deep-tech startup spun out of Bar-Ilan University through the Cadence University Incubator Program. They’ve developed a completely new embedded memory architecture called GCRAM. This three-transistor cell delivers up to 50% area reduction and up to 10X lower power compared to a traditional six-transistor SRAM.

What’s more, the GCRAM bit-cell utilizes decoupled write and read ports, providing native two-ported operation at no additional cost, offering a substantial increase in memory bandwidth. Reducing the memory footprint results in significant fabrication cost savings through die size reduction.

GCRAM is a custom memory solution that RAAAM tailors to specific foundries and process nodes. They’re working with leading foundries and customers to bring the technology into next-generation products. GCRAM has been validated on the silicon of leading semiconductor foundries in process nodes ranging from 16nm to 180nm and was successfully evaluated in 5nm FinFET technology.

Behind GCRAM’s performance is a rigorous design and verification pipeline powered by Cadence analog and mixed-signal technologies. RAAAM relies on the Virtuoso Studio environment to handle the entire design flow, from schematics to custom layout to simulation. The Spectre Simulation Platform is used extensively across multiple levels of complexity, with Spectre X Simulator for high-accuracy simulations, Spectre FX FastSPICE for large fully extracted GCRAM blocks, and Spectre FMC Analysis for fast statistical variation and yield analysis.

To guarantee robust power delivery, RAAM uses the Voltus-XFi Custom Power Integrity Solution for EM-IR signoff. Its tight integration with Virtuoso Studio, along with features like cross-probing and cross-highlighting, helps quickly pinpoint critical devices and potential reliability issues. The result is a faster, more intuitive debug process and high confidence in the final design.

In an era where memory scaling and energy efficiency are more critical than ever, GCRAM offers a path forward that traditional SRAM just can’t match. Learn more about how RAAAM is reinventing on-chip memory with GCRAM using Cadence solutions.

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