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Tanushri Shah
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Semidynamics – Customizable RISC-V Technology for the Next Five AI Revolutions

23 Jan 2025 • 2 minute read

The Designed with Cadence logoIt takes about three years to design a chip. At the same time, there’s a revolution in AI happening every six months. By the time that chip has been designed, five AI revolutions will have taken place. Five AI revolutions from now, will your technology remain useful? Semidynamics' answer is yes.

Semidynamics is a leading IP company for high-performance, AI-enabled RISC-V processors. The company guarantees its customers that they’ll be able to run whatever AI software is invented during their chip development process, thus ensuring they’ll end up with a successful product. But how does it work?

People looking at a screen in a conference room

At the forefront of Semidynamics’ IP is its Gazzillion Misses technology, which is built into its 64-bit RISC-V family cores and meant for memory-intensive applications. While modern processors use non-blocking caches that can tolerate around 16-20 cache misses, Semidynamics’ Gazzillion Misses technology takes the idea of non-blocking caches to the extreme and provides up to 128 cache misses per core. This helps avoid idle time waiting for the main memory to service the data.

What’s more, the Gazzillion Misses technology can be tailored to a customer’s needs to provide an efficient area-performance tradeoff for each memory system. By combining their RISC-V, Vector Unit, Tensor Unit, and Gazzillion Misses technologies, Semidynamics makes AI chips easy to program and scale to whatever new processing is required.

This “all-in-one” IP has a fully customizable RISC-V 64-bit core, Vector Units, Tensor Unit, and Gazzillion Misses technology. With full programmability, the Vector Units can tackle any of today’s activation layers as well as anything new that may come out of the AI software community, while the Tensor Unit provides the sheer matrix multiply capability for convolutions. With just one IP supplier, one RISC-V instruction set, and one tool chain, implementation becomes significantly easier and faster with reduced risk.

To make it all work, Semidynamics has been using Cadence tools for the past two years. The team started by adding the Xcelium Logic Simulator to the toolbox of compilers, and then shortly afterward, they introduced formal verification with the Jasper Formal Verification Platform. The latter has helped Semidynamics become the world’s first company to offer an entirely formally verified microprocessor.

With the help of Cadence tools, Semidynamics has been able to speed up its verification efforts, find bugs faster, and confirm that its designs function in relation to the customer’s requirements. Learn more about how Semidynamics is designing technology for the next five AI revolutions.

“Designed with Cadence” is a series of videos that showcases creative products and technologies that are accelerating industry innovation using Cadence tools and solutions. For more Designed with Cadence videos, check out the Cadence website and YouTube channel.


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