Verisium SimAI: SoC Verification with Unprecedented Coverage Maximization

As hardware complexity increases, the limitations of traditional design verification methods have become glaringly apparent. Given the exhaustive resources and time required for numerous randomized regression runs, achieving thorough coverage in designs with multiple operational modes demands an innovative approach.

Introducing Verisium SimAI by Cadence: a solution that leverages machine learning to redefine the efficiency of regression tests. Verisium SimAI analyzes past regression outcomes intelligently to optimize test suites, ensuring maximal coverage while minimizing redundancy and resource wastage.

Qualcomm Technologies Inc.'s implementation of Verisium SimAI, showcased at CadenceLIVE Silicon Valley 2024, exemplifies its potential to significantly enhance verification productivity. Qualcomm's experience highlights the practical benefits of adopting Verisium SimAI by reducing CPU time and disk space requirements.

Beyond efficiency, Verisium SimAI offers a nuanced approach to coverage closure. It analyzes the contribution of each random variable to coverage, enabling the AI-generated targeted test cases. This level of automation, paired with a suite of analytical tools, offers engineers a significant increase in productivity in their verification processes. Verisium SimAI represents a significant shift towards more intelligent, more efficient design verification, making it a crucial tool for any team navigating the complexities of modern hardware design. 

Cadence's Silicon and Solutions Group (SSG) also believes that exploring Verisium SimAI is a step toward the future of design verification for those interested in achieving higher verification efficiency and accuracy.

“The SSG team has successfully implemented the SimAI App in the Xcelium simulator across PCIe, CXL3, and CXL3 IDE projects, achieving significant advancements in verification efficiency. This innovative tool has dramatically compressed regression seed count by a factor of 4 to 5, achieving comparable code coverage with substantially fewer compute resources. Additionally, introducing an iterative flow, which combines base and synthesized regression, enabled the team to identify and address previously uncovered or rare bins that were not covered across multiple base regressions. This tool enhancement significantly improves our verification processes, leading to more efficient and effective development cycles."
- Tejbal Prasad, Design Engineering Architect, Silicon Solutions Group, Cadence

Learn more: Verisium SimAI is an app that is part of the broader Cadence Verification Suite and can be found in both the Verisium AI-Driven Verification Platform and the Xcelium Logic Simulation.