The Quantum Leap: Equal1 Leverages Cadence Tools for QSoC Design

In today's fast-paced world, the rise of artificial intelligence (AI) is driving skyrocketing expectations for high-performance computing (HPC). To address the expectations, we must overcome complex technical challenges and design and deliver the solution to the market within a reasonable timeframe. This prompts the question: What's next to overcome those challenges, and do we need to explore beyond the electrons in semiconductors to increase the computation speed? Richard Feynman, the renowned theoretical physicist known for his contributions to quantum mechanics, famously stated, "There is plenty of room at the bottom." Quantum computing investigates the behavior of energy and matter at atomic and subatomic levels. It holds the potential to efficiently solve highly complex problems that could take even the fastest supercomputers years to resolve.

However, realizing this capability requires constructing a system with millions of interconnected units known as qubits. Creating and managing such a large number of qubits within a hardware framework presents a significant challenge, as the existing quantum platforms need to radically scale up to deliver quantum computing's true commercial promise. Alpha5, Equal1's quantum SoC (QSoC) is a development towards this goal and represents a groundbreaking quantum computing achievement.

The Equal1 QSoC integrates silicon spin qubits with the cryo electronics circuits needed to control and manipulate spin and turn qubits into quantum circuits. This QSoC contains a hierarchy of quantum tiles, each with cutting-edge cryogenic analog and digital control systems, all operating at 400mK (Kelvin). Cadence tools are central to this revolutionary design, including Virtuoso Studio, Digital Full Flow, Tempus Timing Solution, and  Pegasus Verification System for final chip signoff, facilitating every stage of the design process. This blog explores how Cadence tools were instrumental in overcoming the myriad challenges encountered during the development of QSoC by Equal1.

Design Challenges in the QSoC Development

Operating temperatures of 400mK, mixed-signal complexity, noisy quantum environments, and error correction schemes presented unique challenges for the QSoC design team at Equal1, such as:

• Standard cell behavior modeling: While standard libraries were used, extensive characterization and model extrapolation were needed to account for the effects of cryogenic temperatures, such as reduced leakage currents, increased carrier mobility, and freeze-out effects.
• Low-power design: Power consumption must be minimized due to the limited cooling power of the cryostat and to maintain the optimum temperature for qubit fidelity.
• High-speed RF circuitry: Qubit control requires precise phase alignment and RF pulsing up to 12GHz with minimum insertion losses.
• Precision analog design: High-accuracy, low-noise qubit barrier voltage control and low-noise, high-gain, fast-settling detector circuitry are required for direct interface to the qubits.
• Quantum Error Correction scheme: Requires the use of AI-assisted decoders with full custom hardware implementation to meet latency requirements.
• Flexible tile placement: Accommodating external magnetic fields is needed for spin manipulation.
• Efficient inter-tile communication: For seamless scalability.

Equal1's Hierarchical QSoC

Alpha5 employs a modular architecture based on an array of quantum tiles, each integrating self-contained quantum-controlling circuitry. Each tile features an embedded Arm core to ensure robustness, independent operation, and flexibility in qubit control. It decodes high-level instructions into precise timed digital and analog signals that control qubit interactions. Equal1's QSoC offers scalability and versatility.

Silicon spin qubits are manipulated through analog voltage levels and RF pulsing lines, enabling precise control over quantum states and spin interactions. Equal1's innovative quantum error correction architecture uses AI-assisted decoders for several supported encoding strategies, is fully scalable, and has deterministic latency. The initial implementation targeted 49 qubits for a distance 5 surface code. Integrating high-speed analog and RF components into the SoC demanded creative solutions to maintain signal integrity and minimize power consumption.

Cadence Tools: The Cornerstone of Alpha5's Success

Cadence tools were pivotal in addressing the challenges mentioned above and provided a cohesive environment for RF, mixed-signal design, simulation, verification, and testing.

Virtuoso Studio was crucial for designing the analog and RF circuitry required for qubit control in Equal1's QSoC. The custom mixed-signal logic for generating high-precision control pulses was implemented seamlessly, ensuring the tight phase control needed for spin qubits. Cadence tools enabled the seamless implementation of custom mixed-signal logic, full custom quantum structures, RF and EM field analysis, and the Cadence digital flow was used to implement and sign off the complex, hierarchical digital control system. Genus RTL synthesis and Innovus implementation tools were used to design the RTL blocks, followed by Tempus static timing analysis, Clarity for RF and EM analysis, and Pegasus physical verification for final signoff at block and top level. Floorplanning of the QSoC was particularly challenging due to magnetic constraints, which impacted digital cell placement. Additionally, the Clarity 3D Solver was used for big mesh simulations in the RF domain.

Looking Forward

Equal1's QSoC demonstrates the potential of silicon spin qubits and scalable quantum tile architectures, which can be a breakthrough for high-performance computing (HPC) environments. The success of QSoC design is deeply intertwined with the capabilities of Cadence tools, which provide a comprehensive, reliable, and efficient platform for addressing unique challenges. Looking forward, Equal1 sets the stage for a new era in scalable quantum computing. The future versions aim to integrate more RF circuitry directly onto the chip for larger qubit arrays.

Learn More

• Equal1's Quantum Computing Breakthrough with Arm Technology
• Best Full-Flow PPA
• Virtuoso Studio
• Pegasus Verification System
• Tempus Timing Solution
• Quantum Source Is Taking the Next Step in Photonic Quantum Computing