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Tempus Timing Signoff Solution

SSV 22.1 Base Release Now Available

9 Sep 2022 • 3 minute read

The Silicon Signoff and Verification (SSV) 22.1 release is now available for download at Cadence Downloads. For the list of CCRs fixed in the 22.1 release, see the README.txt file in the installation hierarchy.

SSV221

Here is a list of some of the important updates made to TempusTM Timing Signoff Solution and VoltusTM IC Power Integrity Solution for the 22.1 production release:  

Tempus

  • Aging-Aware STA Analysis
    Semiconductor device performance degrades over time due to various physical phenomena, such as Bias Temperature Instability (BTI), Hot Carrier Injection (HCI), and process node/device failures. The major factors responsible for device degradation are stress duration, temperature, supply voltage, and logic conditions. Traditionally, timing margins are used for accounting for aging-related timing degradation. The Tempus advanced aging-aware timing analysis addresses aging-related effects accurately, minimizes margins, and improves the PPA (power, performance, and area) of a design.

  • Inter Power Domain (IPD) Analysis
    An increase in the number of power domains in a design has become a challenging aspect for designers. This has resulted in a significant increase in the number of timing signoff corners due to cross combinations of voltage corners. This also leads to long cycle times and large compute requirements for timing signoff. To reduce the cycle time and computation requirements, Tempus provides the new capability to run inter-power domain (IPD) analysis, where only IPD logic in the design will be analyzed, and the timing reports will generate data for the relevant IPD logic only. The reduced capacity requirement per IPD run helps to analyze the IPD logic of the design efficiently.

  • Via Variation Flow
    The statistical via variation feature allows you to define the sensitivity of via resistance as a function of area. Tempus computes the interconnect variation based on statistical via resistance. To support the via variation flow, additional data for modeling via variation is required. This includes via variation side file that contains look-up tables of via resistance statistical data and the extend SPEF file that contains via resistance layer and area information. Tempus timing reports show interconnect variation in the results when via variation is enabled.

For more details about the new and enhanced features introduced in this release, see Tempus What's New.

Voltus

  • Performance and Capacity Enhancements
    The following enhancements have been made to increase the performance and capacity and provide a better user experience for large designs:
    • Support for localized disk data caching to retrieve information quickly and speed up the processing time
    • Enhanced capacity for die-model generation by using the advanced Model Order Reduction (MOR) techniques
    • Improved the method for fracturing Non-Manhattan shapes, enabling current-aware modeling of the shapes
    • Enhanced algorithm for hierarchical net-tracing in designs with many hierarchies

  • Simplified Use Model for Power Analysis Flows
    A new seamless unified solution, "Event-Based Power Analysis," has been introduced to support multiple power analysis flows simultaneously. In this model, the tool performs accurate state-based power estimation for all events of a scenario in a design. Event-Based Power Analysis is applicable to all event-based vectors, such as VCD, FSDB, SHM, and PHY.  The use model for event-based power analysis is: set_power_analysis_mode -method event_based.


  • New Smart Windows Feature
    Voltus introduces the new smart window feature for extracting peak power scenarios from a vector-based activity file. The smart window is a variable size window that enables designers to capture maximum regions of high power dissipation.

  • Support for Multi-Die Self-Heating Effect Flow
    Voltus now supports the multi-die Self-Heating Effect (SHE) analysis flow to understand the effect of temperature variations in gate-level designs. Previously, the SHE flow was supported only in the single-die mode using the analyze_self_heat command.

For more details about the new and enhanced features introduced in this release, see Voltus What's New.

Please send questions and feedback to ssv_rm@cadence.com.

SSV Release Team


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