Never miss a story from Digital Design. Subscribe for in-depth analysis and articles.
Reliable semiconductors will be crucial to the success of future safety systems. Although design environments and verification have advanced at all stages of IC development, safety must be considered first and cannot be an afterthought. To obtain the ISO-26262 certification, designers must integrate functional safety into the design flow while Synthesizing, Implementing, and Verifying it. The target is to keep the safety-critical semiconductor devices in a safe state (where the system doesn’t cause unreasonable risk) throughout their operating lifetime.
The Cadence Midas Safety Platform tightly integrates with the complete Digital Implementation flow to implement Functional Safety in IC. Midas Safety Platform performs the FMEDA (Failure Mode Effects and Diagnostic Analysis) and helps achieve target ASIL for your automotive electronic devices.
The typical automotive ASIL classification is shown here:
The Cadence Midas Safety Platform provides an early-phase exploration of functional safety architectures and leverages native chip design data to perform accurate safety analysis efficiently. Midas integrates with Cadence Digital Design flow using the Unified Safety Format (USF) file, which captures the functional safety intent of the device.
Are you curious about how we can implement and verify functional safety in the Design? Here is the course “Functional Safety Implementation and Verification with Midas” which will clear all your concepts and queries.
After taking this course, you will be able to:
Want To Learn More about the Functional Safety Implementation:
We can also organize this “MidasIFS (Link)” training for you as a “Blended” or “Live” training. Please reach out to Cadence Training for further information.
Register for the Online Training with the following steps:
Also, don't forget to obtain your Digital Badge after finishing the training.