Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
This course combines our Allegro PCB Editor Basic Techniques, followed by Allegro PCB Editor Intermediate Techniques.
Virtuoso Analog Design Environment Verifier 16.7
Learn learn to perform requirements-driven analog verification using the Virtuoso ADE Verifier tool.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Two capabilities in SystemVerilog allow for the creation of a module that can produce a sine wave as an output: the ability to pass real values through port connections and DPI.
Obviously, to produce a sine wave, you need access to the sin function. This is where DPI is handy to add the math functions to your simulation. Here is an example of a package I created to contain the math functions:
task C Name = SV function name
"DPI" pure function real cos (input real rTheta);
"DPI" pure function real sin (input real rTheta);
"DPI" pure function real log (input real rVal);
"DPI" pure function real log10 (input real rVal);
endpackage : math_pkg
The import"DPI" construct defines a new function that you can use in your code that refers to a C function. In the case of the math functions listed above, they already exist in the libmath.so library built into Linux and so there is no additional code required.
Now that I have my math functions, I can create my module.
module sine_wave(output real
sampling_time = 5;
const real pi =
real time_us, time_s ;
real freq = 20;
real offset = 2.5;
real ampl = 2.5;
= #(sampling_time) ~sampling_clock;
assign sine_out =
offset + (ampl * sin(2*pi*freq*time_s));
Here I have used import in a different context. In this case import is used to make the code in my package available to the scope in which I import it. Now when I call the sinn function, it will use the DPI code from math_pkg to execute the function.
The sine_wave module also shows the use of passing a real value through a port. The output sine_out is of type real and is computed using the sin function.
SystemVerilog allows a real variable to be used as a port. The limitation is that a real variable can only be driven by a single driver. If that is a problem, you can make the module a Verilog AMS module and define the real variable as a wreal (real wire). By using wreal, you can have multiple drivers and use a variety of resolution types to solve any conflicts.
I have a signal generating sine wave. Need some code that can make sense out of it in terms of frequency, amplitude etc. and dump it in a file.
Any quick thoughts please,
If we are at it already, here is the COS function, Root of 2, Natural base LOG, LOG 2 and LOG 10 (best to have all these and the SIN function together in the same file since they may call on each other):
// COS function
function real cos;
cos = sin(x + `PI / 2.0);
// ROOT of 2
function real rootof2;
power = 0.82629586;
power = power / 10000000.0;
power = power + 1.0;
i = -23;
if (n >= 1)
power = 2.0;
i = 0;
for (i=i; i< n; i=i+1)
power = power * power;
rootof2 = power;
endfunction // rootof2
// does LOG_N of a number
function real log_n;
if (x <= 0.0)
$display("log N illegal argument:",x);
log_n = 0.0;
re = 1.0/x;
re = x;
log_2 = 0.0;
for (i=7; i>=-23; i=i-1)
if (re > rootof2(i))
re = re/rootof2(i);
log_2 = 2.0*log_2 + 1.0;
log_2 = log_2*2.0;
if (x < 1.0)
log_n = -log_2/12102203.16;
log_n = log_2/12102203.16;
endfunction // log_n
// does LOG2 of a number - using LOG_N
function real log2;
log2 = log_n(x)/log_n(2.0);
endfunction // log2
// does LOG10 of a number - using LOG_N
function real log10;
log10 = log_n(x)/log_n(10.0);
endfunction // log10
That works great! I just put your code in my package in place of the "import...sin" and it worked like a champ.
Thanks for sharing,
Hi Tim, I had this same problem before and used something else I found:
A function that has a sin approximation, input is real, and you invoke the function at the desired clock rate and supplying the desired input, here is the code:
`define PI 3.14159265
function real sin;
sign = 1.0;
x1 = x;
x1 = -x1;
sign = -1.0;
while (x1 > `PI/2.0)
x1 = x1 - `PI;
sign = -1.0*sign;
y = x1*2/`PI;
y2 = y*y;
y3 = y*y2;
y5 = y3*y2;
y7 = y5*y2;
sum = 1.570794*y - 0.645962*y3 +
0.079692*y5 - 0.004681712*y7;
sin = sign*sum;
endfunction // sin