• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Blogs
  2. Verification
  3. C-to-Silicon Does Not Require a Library Characterizatio…
TeamESL
TeamESL

Community Member

Blog Activity
Options
  • Subscribe by email
  • More
  • Cancel
High-Level Synthesis
high-level synthesis adoption
System Design and Verification
ESC
C-to-Silicon
ESL handoff
C-to-Silicon Compiler
ESL
architect

C-to-Silicon Does Not Require a Library Characterization

13 Feb 2009 • Less than one minute read
One of the key strengths of C-to-Silicon Compiler (CtoS) over other ESL Synthesis tools is its ability to directly read industry standards .lib files. By providing this ability an expensive library characterization which is required by other ESL Synthesis tools is avoided.

This approach not only avoids an expensive library characterization, which only provides estimates of the component delays, but also has the advantage of using the synthesized components in the context of the actual design. This is done using CtoS's built-in RTL Compiler synthesis engine and the provided .lib file to synthesize and analyze the timing of the generated RTL from which CtoS gets accurate feedback to refine the scheduling of components.

The end result is higher quality RTL with more aggressive resource sharing that once synthesized, meets the timing requirements in the targeted technology.

This Team ESL posting is provided by Dr. Sergio Ramirez, Sr Staff Product Engineer for the C-to-Silicon Compiler high level synthesis product.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information